поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

Preview PDF HTML

SC16C752B датащи(PDF) 14 Page - NXP Semiconductors

номер детали SC16C752B
подробное описание детали  5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
PDF  47 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  PHILIPS [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

SC16C752B датащи(HTML) 14 Page - NXP Semiconductors

Back Button SC16C752B Datasheet HTML 10Page - NXP Semiconductors SC16C752B Datasheet HTML 11Page - NXP Semiconductors SC16C752B Datasheet HTML 12Page - NXP Semiconductors SC16C752B Datasheet HTML 13Page - NXP Semiconductors SC16C752B Datasheet HTML 14Page - NXP Semiconductors SC16C752B Datasheet HTML 15Page - NXP Semiconductors SC16C752B Datasheet HTML 16Page - NXP Semiconductors SC16C752B Datasheet HTML 17Page - NXP Semiconductors SC16C752B Datasheet HTML 18Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 14 / 47 page
background image
Philips Semiconductors
SC16C752B
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
Product data
Rev. 03 — 14 December 2004
14 of 47
9397 750 14443
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
6.5.1
Interrupt mode operation
In interrupt mode (if any bit of IER[3:0] is 1) the processor is informed of the status of
the receiver and transmitter by an interrupt signal, INT. Therefore, it is not necessary
to continuously poll the line status register (LSR) to see if any interrupt needs to be
serviced. Figure 8 shows interrupt mode operation.
6.5.2
Polled mode operation
In polled mode (IER[3:0] = 0000) the status of the receiver and transmitter can be
checked by polling the line status register (LSR). This mode is an alternative to the
FIFO interrupt mode of operation where the status of the receiver and transmitter is
automatically known by means of interrupts sent to the CPU. Figure 9 shows FIFO
polled mode operation.
Fig 8.
Interrupt mode operation.
11
11
IIR
IER
THR
RHR
PROCESSOR
IOW / IOR
INT
002aaa230
Fig 9.
FIFO polled mode operation.
00
00
LSR
IER
THR
RHR
PROCESSOR
IOW / IOR
002aaa231



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com