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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SC16C752B датащи(PDF) 12 Page - NXP Semiconductors |
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SC16C752B датащи(HTML) 12 Page - NXP Semiconductors |
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12 / 47 page  Philips Semiconductors SC16C752B 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs Product data Rev. 03 — 14 December 2004 12 of 47 9397 750 14443 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. 6.4 Reset Table 4 summarizes the state of register after reset. [1] Registers DLL, DLH, SPR, Xon1, Xon2, Xoff1, Xoff2 are not reset by the top-level reset signal RESET, i.e., they hold their initialization values during reset. Table 5 summarizes the state of registers after reset. Table 4: Register reset functions Register Reset control Reset state Interrupt enable register RESET All bits cleared. Interrupt identification register RESET Bit 0 is set. All other bits cleared. FIFO control register RESET All bits cleared. Line control register RESET Reset to 00011101 (1D hex). Modem control register RESET All bits cleared. Line status register RESET Bits 5 and 6 set. All other bits cleared. Modem status register RESET Bits 0-3 cleared. Bits 4-7 input signals. Enhanced feature register RESET All bits cleared. Receiver holding register RESET Pointer logic cleared. Transmitter holding register RESET Pointer logic cleared. Transmission control register RESET All bits cleared. Trigger level register RESET All bits cleared. Table 5: Signal RESET functions Signal Reset control Reset state TX RESET high RTS RESET high DTR RESET high RXRDY RESET high TXRDY RESET low |
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