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AD9528

Data Sheet

Rev. C | Page 24 of 67

TERMINOLOGY

Phase Jitter

An ideal sine wave has a continuous and even progression of

phase with time from 0° to 360° for each cycle. Actual signals,

however, display a certain amount of variation from ideal phase

progression over time. This phenomenon is called phase jitter.

Although many causes can contribute to phase jitter, one major

cause is random noise, which is characterized statistically as

being Gaussian (normal) in distribution.

Phase jitter leads to a spreading out of the energy of the sine

wave in the frequency domain, producing a continuous power

spectrum. This power spectrum is usually reported as a series of

values with the units dBc/Hz at a given offset in frequency from

the sine wave (carrier). The value is a ratio (expressed in decibels)

of the power contained within a 1 Hz bandwidth with respect to

the power at the carrier frequency. For each measurement, the

offset from the carrier frequency is also given.

In some applications, it is meaningful to integrate only the total

power contained within some interval of offset frequencies (for

example, 10 kHz to 10 MHz). This is called the integrated phase

noise over that frequency offset interval and can be readily related

to the time jitter due to the phase noise within that offset frequency

interval.

Phase Noise

Phase noise has a detrimental effect on the performance of

analog-to-digital converters (ADCs), digital-to-analog

converters (DACs), and radio frequency (RF) mixers. It lowers

the achievable dynamic range of the converters and mixers,

although they are affected in somewhat different ways.

Time Jitter

Phase noise is a frequency domain phenomenon. In the time

domain, the same effect is exhibited as time jitter. When observing

a sine wave, the time of successive zero crossings varies. In a

square wave, the time jitter is a displacement of the edges from

their ideal (regular) times of occurrence. In both cases, the

variations in timing from the ideal are the time jitter. Because

these variations are random in nature, the time jitter is specified

in seconds root mean square (rms) or 1 sigma of the Gaussian

distribution.

Time jitter that occurs on a sampling clock for a DAC or an

ADC decreases the SNR and dynamic range of the converter. A

sampling clock with the lowest possible jitter provides the

highest performance from a given converter.

Additive Phase Noise

Additive phase noise is the amount of phase noise that is

attributable to the device or subsystem being measured. The

phase noise of any external oscillators or clock sources is

subtracted. This makes it possible to predict the degree to which

the device impacts the total system phase noise when used in

conjunction with the various oscillators and clock sources, each

of which contributes its own phase noise to the total. In many

cases, the phase noise of one element dominates the system

phase noise. When there are multiple contributors to phase

noise, the total is the square root of the sum of squares of the

individual contributors.

Additive Time Jitter

Additive time jitter is the amount of time jitter that is attributable to

the device or subsystem being measured. The time jitter of any

external oscillators or clock sources is subtracted. This makes it

possible to predict the degree to which the device impacts the

total system time jitter when used in conjunction with the various

oscillators and clock sources, each of which contributes its own

time jitter to the total. In many cases, the time jitter of the external

oscillators and clock sources dominates the system time jitter.

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