SC16C652 datasheet(7/41 Pages) PHILIPS

7 / 41 page

Philips Semiconductors

SC16C652

Dual UART with 32 bytes of transmit and receive FIFOs

Product data

Rev. 04 — 20 June 2003

7 of 41

9397 750 11634

Functional description

The SC16C652 provides serial asynchronous receive data synchronization,

parallel-to-serial and serial-to-parallel data conversions for both the transmitter and

receiver sections. These functions are necessary for converting the serial data

stream into parallel data that is required with digital data systems. Synchronization for

the serial data stream is accomplished by adding start and stop bits to the transmit

data to form a data character (character orientated protocol). Data integrity is insured

by attaching a parity bit to the data character. The parity bit is checked by the receiver

for any transmission bit errors. The electronic circuitry to provide all these functions is

fairly complex, especially when manufactured on a single integrated silicon chip. The

SC16C652 represents such an integration with greatly enhanced features. The

SC16C652 is fabricated with an advanced CMOS process.

The SC16C652 is an upward solution that provides a dual UART capability with

32 bytes of transmit and receive FIFO memory, instead of 16 bytes for the 16C2550

and none in the 16C2450. The SC16C652 is designed to work with high speed

modems and shared network environments that require fast data processing time.

Increased performance is realized in the SC16C652 by the transmit and receive

FIFOs. This allows the external processor to handle more networking tasks within a

given time. In addition, the four selectable receive and transmit FIFO trigger interrupt

levels are uniquely provided for maximum data throughput performance especially

when operating in a multi-channel environment. The FIFO memory greatly reduces

the bandwidth requirement of the external controlling CPU, increases performance,

and reduces power consumption.

The SC16C652 is capable of operation up to 5 Mbits/s with a 24 MHz clock. With a

crystal or external clock input of 7.3728 MHz, the user can select data rates up to

460.8 kbits/s.

The rich feature set of the SC16C652 is available through internal registers.

Selectable receive and transmit FIFO trigger levels, selectable TX and RX baud rates,

and modem interface controls are all standard features. Following a power-on reset or

an external reset, the SC16C652 is software compatible with the previous generation,

SC16C2550 and ST16C2450.

6.1 UART A-B functions

The UART provides the user with the capability to bi-directionally transfer information

between an external CPU, the SC16C652 package, and an external serial device. A

logic 0 on chip select pins CSA and/or CSB allows the user to conﬁgure, send data,

and/or receive data via UART channels A-B. Individual channel select functions are

shown in Table 3.

Table 3:

Serial port selection

Chip Select

Function

CSA-CSB = 1

none

CSA = 0

UART channel A

CSB = 0

UART channel B

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