поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

SC16C652 датащи(PDF) 4 Page - NXP Semiconductors

номер детали SC16C652
подробное описание детали  Dual UART with 32 bytes of transmit and receive FIFOs
PDF  41 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  PHILIPS [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

SC16C652 датащи(HTML) 4 Page - NXP Semiconductors

  SC16C652 Datasheet HTML 1Page - NXP Semiconductors SC16C652 Datasheet HTML 2Page - NXP Semiconductors SC16C652 Datasheet HTML 3Page - NXP Semiconductors SC16C652 Datasheet HTML 4Page - NXP Semiconductors SC16C652 Datasheet HTML 5Page - NXP Semiconductors SC16C652 Datasheet HTML 6Page - NXP Semiconductors SC16C652 Datasheet HTML 7Page - NXP Semiconductors SC16C652 Datasheet HTML 8Page - NXP Semiconductors SC16C652 Datasheet HTML 9Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 41 page
background image
Philips Semiconductors
SC16C652
Dual UART with 32 bytes of transmit and receive FIFOs
Product data
Rev. 04 — 20 June 2003
4 of 41
9397 750 11634
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
5.
Pinning information
5.1 Pinning
5.2 Pin description
Fig 2.
LQFP48 pin configuration.
SC16C652IB48
002aaa349
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
D5
D6
D7
RXB
RXA
TXRDYB
TXA
TXB
OP2B
CSA
CSB
N.C.
RESET
DTRB
DTRA
RTSA
OP2A
RXRDYA
INTA
INTB
A0
A1
A2
N.C.
Table 2:
Pin description
Symbol
Pin
Type
Description
LQFP48
A0
28
I
Address 0 select bit. Internal register address selection.
A1
27
I
Address 1 select bit. Internal register address selection.
A2
26
I
Address 2 select bit. Internal register address selection.
CSA, CSB
10, 11
I
Chip Select A, B (Active-LOW). This function is associated with individual channels, A
through B. These pins enable data transfers between the user CPU and the SC16C652
for the channel(s) addressed. Individual UART sections (A, B) are addressed by providing
a logic 0 on the respective CSA, CSB pin.
D0-D7
44-48, 1-3 I/O
Data bus (bi-directional). These pins are the 8-bit, 3-State data bus for transferring
information to or from the controlling CPU. D0 is the least significant bit and the first data
bit in a transmit or receive serial data stream.
GND
17
I
Signal and power ground.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com