ADPD103 datasheet(28/53 Pages) AD

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Data Sheet

ADPD103

Rev. B | Page 27 of 52

CALCULATING CURRENT CONSUMPTION

The current consumption of the ADPD103 depends on the user

selected operating configuration, as described in the following

equations.

Total Power Consumption

To calculate the total power consumption, use Equation 4.

LEDB

AVG

LEDB

LEDA

AVG

LEDA

AVG

VDD

Power

Total

(4)

Average VDD Supply Current

To calculate the average VDD supply current, use Equation 5.

STANDBY

VDD

PROC

SLOTB

AFE

SLOTA

AFE

AVG

VDD

)

(

)

((

(5)

where:

DR = the data rate in Hz.

IVDD_STANDBY = 3.5 × 10−3 mA.

QPROC is an average charge associated with a processing time, as

follows:

•

Only Time Slot A enabled: QPROC = 0.64 × 10−3 mC

•

Only Time Slot B enabled: QPROC = 0.51 × 10−3 mC

•

Time Slot A and Time Slot B enabled: QPROC = 0.69 ×

10−3 mC

225

)

(

)

(

)

(

−

PEAK

AFE

LEDx

CHANNELS

NUM

(6)

COUNT

PULSE

PERIOD

LEDx

OFFSET

LEDx

SLOTx

(sec)

(7)

where:

NUM_CHANNELS is the number of active channels.

LEDxPEAK is the peak LED current expressed in mA.

LEDx_OFFSET is the pulse start time offset expressed in

seconds.

LEDx_PERIOD is the pulse period expressed in seconds.

PULSE_COUNT is the number of pulses.

Note that if either Time Slot A or Time Slot B are disabled, IAFE_x

= 0 for that respective time slot. Additionally, if operating in

digital integrate mode, power savings can be realized by setting

band-pass filters that are bypassed in digital integrate mode,

changing the AFE power contribution calculation to:

225

)

(

)

(

)

(

−

PEAK

AFE

LEDx

CHANNELS

NUM

Average VLEDA Supply Current

To calculate the average VLEDA supply current, use Equation 8.

ILED_AVG_A = (SLOTA_LED_WIDTH/1 × 106) × LEDAPEAK ×

DR × PULSE_COUNT

(8)

where LEDAPEAK is LED1PEAK, LED2PEAK, or LED3PEAK, expressed

in mA, for whichever LED is selected for Time Slot A.

Average VLEDB Supply Current

To calculate the average VLEDB supply current, use Equation 9.

ILED_AVG_B = (SLOTB_LED_WIDTH/1 × 106) × LEDBPEAK ×

DR × PULSE_COUNT

(9)

where LEDBPEAK is LED1PEAK, LED2PEAK, or LED3PEAK, expressed

in mA, for whichever LED is selected for Time Slot B.

OPTIMIZING SNR PER WATT

The ADPD103 offers a variety of parameters that the user can

adjust to achieve the best signal. One of the key goals of system

performance is to obtain the best system SNR for the lowest

total power. This is often referred to as optimizing SNR/watt. Even

in systems where only the SNR matters and power is a secondary

concern, there may be a lower power or a high power means of

achieving the same SNR.

Optimizing for Peak SNR

The first step in optimizing for peak SNR is to find a TIA gain

and LED level that gives the best performance where the

number of LED pulses remains constant. If peak SNR is the

goal, the noise section of Table 3 can be used as a guide. It is

important to note that the SNR improves as a square root of the

number of pulses averaged together, whereas the increase in the

LED power consumed is directly proportional to the number of

LED pulses. In other words, for every doubling of the LED pulse

count, there is a doubling of the LED power consumed and a 3 dB

SNR improvement.As a result, avoid any change in the gain

configuration that provides less than 3 dB of improvement for a 2×

power penalty; any TIAgain configuration that provides more

than 3 dB of improvement for a 2× power penalty is a good

choice. If peak SNR is the goal and there is no issue saturating

the photodiode with LED current at any gain, the 50k TIA gain

setting is an optimal choice. After the SNR per pulse per

channel is optimized, the user can then increase the number of

pulses to achieve the desired system SNR.

Optimizing SNR per Watt in a Signal Limited System

In practice, optimizing for peak SNR is not always practical.

One scenario in which the photoplethysmography (PPG) signal

has a poor SNR is the signal limited regime. In this scenario, the

LED current reaches an upper limit before the desired dc return

level is achieved.

Tuning in this case starts where the peak SNR tuning stops. The

starting point is nominally a 50k gain, as long as the lowest LED

current setting of 8 mA does not saturate the photodiode and

the 50k gain provides enough protection against intense back-

ground light. In these cases, use a 25k gain as the starting point.

The goal of the tuning process is to bring the dc return signal to

a specific ADC range, such as 50% or 60%. The ADC range

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