ADPD103 datasheet(22/53 Pages) AD

22 / 53 page

Data Sheet

ADPD103

Rev. B | Page 21 of 52

NOTES

1. THE SHADED AREAS REPRESENT WHEN THE DEVICE IS LISTENING.

MASTER START

SLAVE ADDRESS + WRITE

SLAVE

ACK

MASTER START

SLAVE ADDRESS + WRITE

ACK/NACK

STOP

SLAVE

ACK

DATA[7:0]

DATA[15:8]

SLAVE ADDRESS + READ

ACK

DATA[7:0]

DATA[15:8]

STOP

ACK

DATA TRANSFERRED

n (DATA[15:8]+ACK+DATA[7:0] + ACK/NACK)

MASTER START

SLAVE ADDRESS + WRITE

NACK

STOP

SLAVE

ACK

DATA[7:0]

SLAVE ADDRESS + READ

ACK

DATA[15:8]

ACK

I2C WRITE

I2C SINGLE WORD READ MODE

I2C MULTIWORD READ MODE

Figure 19. I2C Write and Read Operations

TYPICAL CONNECTION DIAGRAM

Figure 21 and Figure 22 show two possible photodiode input

connections for the ADPD103. The 1.8 V I2C communication

lines, SCL and SDA, along with the INT line, connect to a

system microprocessor or sensor hub. The I2C signals can have

pull-up resistors connected to a 1.8 V or a 3.3 V power supply.

The INT and PDSO signals are only compatible with a 1.8 V

supply and may need a level translator.

Provide the 1.8 V supply, VDD, to AVDD and DVDD. Use single

(VLED) or multiple (VLED1, VLED2, and VLED3) sources for the LED

supply using standard regulator circuits according to the peak

current requirements specified in Table 3 and calculated in the

Calculating Current Consumption section.

For best noise performance, connect AGND, DGND (exposed

pad), and LGND together at a large conductive surface such as a

ground plane, a ground pour, or a large ground trace.

The number of photodiodes or LEDs used varies. There are

multiple ways to connect photodiodes to the input channels,

as shown in Table 16 and Figure 23. The photodiode anodes are

connected to the PD1 to PD8 input pins, and the photodiode

cathodes are connected to the cathode pin.

With large photodiodes, the dynamic range can be increased by

splitting the current between multiple inputs. As a result, if only

one large photodiode is used and the receive signal is expected

to be large, the diode can be branched across all four inputs in a

given time slot. This type of configuration is shown in Figure 21.

For situations where the photodiode is small or the signal is greatly

attenuated, the photodiode can be connected directly to a single

channel such as PD1 or PD5. This connection, shown in Figure 22,

maximizes SNR for low signals. Do not connect the same

photodiode to all eight input channels. It is important to leave the

unused input channels floating for proper device operation. The

WLCSP package is internally wired for high dynamic range mode.

Figure 20 shows the recommended connection diagram and

printed circuit board (PCB) layout for the ADPD103 WLCSP

package. See Figure 21 or Figure 22 for connection details.

The current input pins (PD1 to PD8) have a typical voltage of

1.3 V during the sampling period. During the sleep period,

these pins are connected to the cathode pin. The cathode and

anode voltages are listed in Table 3.

LGND

LEDX2

LEDX3

LEDX1

SDA

SCL

INT

DVDD

DGND

PDSO

VREF

AVDD

PD5-8

PDC

PD1-4

AGND

Figure 20. WLCSP Package Connection and PCB Layout Diagram (Top View)

INT

PDSO

DVDD

AGND

VREF

AVDD

PD1

PD8

NIC

ADPD103

TOP VIEW

(Not to Scale)

4.7µF

VLED2 VLED1

4.7µF

VLED3

I2C BUS

TO/FROM

HOST PROCESSOR

POWER-DOWN

CONTROL

0.1µF

1.8V

Figure 21. Connection Diagram for Increased Dynamic Range

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