TMS320VC5407 datasheet(21/110 Pages) TI

21 / 110 page

Introduction

November 2001 − Revised April 2004

SPRS007D

Table 2−2. Signal Descriptions (Continued)

TERMINAL

NAME

DESCRIPTION

I/O†

HOST PORT INTERFACE PINS

A0−A15

These pins can be used to address internal memory via the HPI when the HPI16 pin is HIGH.

D0−D15

I/O

These pins can be used to read/write internal memory via the HPI when the HPI16 pin is high. The sixteen

data pins, D0 to D15, are multiplexed to transfer data between the core CPU and external data/program

memory, I/O devices, or HPI in 16-bit mode. The data bus is placed in the high-impedance state when not

outputting or when RS or HOLD is asserted. The data bus also goes into the high-impedance state when

OFF is low.

The data bus includes bus holders to reduce the static power dissipation caused by floating, unused pins.

The bus holders also eliminate the need for external bias resistors on unused pins. When the data bus is

not being driven by the DSP, the bus holders keep the pins at the logic level that was most recently driven.

The data bus holders of the DSP are disabled at reset, and can be enabled/disabled via the BH bit of the

BSCR.

HD0−HD7

I/O/Z

Parallel bi-directional data bus. These pins can also be used as general-purpose I/O pins when the HPI16 pin

is high. HD0−HD7 is placed in the high-impedance state when not outputting data or when OFF is low. The

HPI data bus includes bus holders to reduce the static power dissipation caused by floating, unused pins. When

the HPI data bus is not being driven by the DSP, the bus holders keep the pins at the logic level that was most

recently driven. The HPI data bus holders are disabled at reset, and can be enabled/disabled via the HBH bit

of the BSCR.

HCNTL0

HCNTL1

Control inputs. These inputs select a host access to one of the three HPI registers. (Pullup only enabled when

HPIENA=0, HPI16=1)

HBIL

Byte identification input. Identifies first or second byte of transfer. (Pullup only enabled when HPIENA=0, invalid

when HPI16=1)

HCS

Chip select input. This pin is the select input for the HPI, and must be driven low during accesses.

(Pullup only enabled when HPIENA=0, or HPI16=1)

HDS1

HDS2

Data strobe inputs. These pins are driven by the host read and write strobes to control transfers.

(Pullup only enabled when HPIENA=0)

HAS

Address strobe input. Address strobe input. Hosts with multiplexed address and data pins require this input,

to latch the address in the HPIA register. (Pull-up only enabled when HPIENA=0)

HR/W

Read/write input. This input controls the direction of an HPI transfer. (Pullup only enabled when HPIENA=0)

HRDY

O/Z

Ready output. The ready output informs the host when the HPI is ready for the next transfer. HRDY goes into

the high-impedance state when OFF is low.

HINT

O/Z

Interrupt output. This output is used to interrupt the host. When the DSP is in reset, this signal is driven

high. HINT can also be used for timer 1 output (TOUT1), when the HPI is disabled. The signal goes into the

high-impedance state when OFF is low. (invalid when HPI16=1)

HPIENA

HPI enable input. This pin must be tied directly to DVDD to enable the HPI. An internal pulldown resistor is

always active and the HPIENA pin is sampled on the rising edge of RS. If HPIENA is left open or driven low

during reset, the HPI module is disabled. Once the HPI is disabled, the HPIENA pin has no effect until the DSP

is reset.

HPI16

HPI 16-bit Select Pin. This pin must be tied directly to DVDD to enable HPI16 mode. This input pin has an

internal pulldown resistor which is always active. If HPI16 is left open or driven low, HPI16 mode is disabled.

The non-multiplexed mode allows hosts with separate address/data buses to access the HPI address range

via the 16 address pins A0−A15. 16-bit Data is also accessible through pins D0−D15. HOST-to-DSP and

DSP-to-HOST interrupts are not supported. There are no HPIC and HPIA registers in the non-multiplexed

mode since there are HCNTRL0,1 signals available.

† I = Input, O = Output, Z = High-impedance, S = Supply

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