TMS320VC5407 datasheet(71/110 Pages) TI

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Electrical Specifications

November 2001 − Revised April 2004

SPRS007D

5.3

Electrical Characteristics Over Recommended Operating Case Temperature

Range (Unless Otherwise Noted)

PARAMETER

TEST CONDITIONS

MIN

TYP†

MAX

UNIT

High level output voltage‡

DVDD = 3 V to 3.6 V, IOH = MAX

2.4

VOH

High-level output voltage‡

DVDD = 2.7 V to 3 V, IOH = MAX

2.2

VOL

Low-level output voltage‡

IOL = MAX

0.4

Input current in high

A[22:0]

MAX V

to DV

275

µA

IIZ

Input current in high

impedance

A[22:0]

DVDD = MAX, VO = DVSS to DVDD

−275

275

µA

X2/CLKIN

−40

µA

TRST

With internal pulldown

−10

800

Input current

HPIENA

With internal pulldown, RS = 0

−10

400

Input current

(VI = DVSS to DVDD) TMS, TCK, TDI, HPI§

With internal pullups

−400

µA

D[15:0], HD[7:0]

Bus holders enabled, DVDD = MAXk

−275

275

µA

All other input-only pins

−5

IDDC

Supply current, core CPU

CVDD = 1.5 V, fx = 120 MHz,¶ TC = 25°C

42#

IDDP

Supply current, pins

DVDD = 3.0 V, fx = 120 MHz,¶ TC = 25°C

20||

Supply current,

IDLE2

PLL × 1 mode, 20 MHz input

IDD

Supply current,

standby

IDLE3

Divide-by-two mode, CLKIN stopped

Input capacitance

Output capacitance

† All values are typical unless otherwise specified.

‡ All input and output voltage levels except RS, INT0−INT3, NMI, X2/CLKIN, CLKMD1−CLKMD3 are LVTTL-compatible.

§ HPI input signals except for HPIENA.

¶ Clock mode: PLL × 1 with external source

# This value was obtained with 50% usage of MAC and 50% usage of NOP instructions. Actual operating current varies with program being

executed.

|| This value was obtained with single-cycle external writes, CLKOFF = 0 and load = 15 pF. For more details on how this calculation is performed,

refer to the Calculation of TMS320LC54x Power Dissipation application report (literature number SPRA164).

kVIL(MIN) ≤ VI ≤ VIL(MAX) or VIH(MIN) ≤ VI ≤ VIH(MAX)

hMaterial with high IDD has been observed with an IDD as high as 7 mA during high temperature testing.

Tester Pin

Electronics

VLoad

IOL

IOH

Output

Under

Test

50 Ω

Where:

IOL

= 1.5 mA (all outputs)

IOH

= 300 µA (all outputs)

VLoad

= 1.5 V

= 20-pF typical load circuit capacitance

Figure 5−1. 3.3-V Test Load Circuit

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