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DS3134 датащи(PDF) 140 Page - Dallas Semiconductor |
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DS3134 датащи(HTML) 140 Page - Dallas Semiconductor |
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140 / 203 page ![]() DS3134 140 of 203 Bits 8 to 10 / Transmit Done Queue Status Bit Threshold Setting (TDQT0 to TDQT2). These 3 bits determine when the DMA will set the Transmit DMA Done Queue Write (TDQW) status bit in the Status Register for DMA (SDMA) register. 000 = set the TDQW status bit after each descriptor write to the Done Queue 001 = set the TDQW status bit after 2 or more descriptors are written to the Done Queue 010 = set the TDQW status bit after 4 or more descriptors are written to the Done Queue 011 = set the TDQW status bit after 8 or more descriptors are written to the Done Queue 100 = set the TDQW status bit after 16 or more descriptors are written to the Done Queue 101 = set the TDQW status bit after 32 or more descriptors are written to the Done Queue 110 = set the TDQW status bit after 64 or more descriptors are written to the Done Queue 111 = set the TDQW status bit after 128 or more descriptors are written to the Done Queue 8.2.5 DMA CHANNEL CONFIGURATION RAM Onboard the device there is a set of 1536 dwords (6 dwords per channel times 256 channels) that are used by the Host to configure the DMA and by the DMA to store values locally when it is processing a packet. Most of the fields within the DMA Configuration RAM are for use by the DMA and the Host will never write to these fields. The Host is only allowed to write (i.e. configure) to the lower word of dword 1 for each HDLC channel. The Host configurable fields are denoted with a thick box as shown below. Transmit DMA Configuration RAM Figure 8.2.5A dmatcram msb 31 lsb 0 Transmit DMA Configuration RAM 000h 004h 008h HDLC Channel 1 00Ch 010h 014h HDLC Channel 256 Fields shown within the thick box are written by the Host; all other fields are for usage by the DMA and can only be read by the Host Next Descriptor Pointer (16) Next Priority Pending Descriptor Pointer (16) Byte Count (13) Current Packet Data Buffer Address (32) Start Descriptor Pointer (16) CH EN Last Pending Descriptor Pointer (16) Next Pending Descriptor Pointer (16) Next Priority Descriptor Pointer (16) Last Priority Pending Descriptor Pointer (16) DQS unused (16) EOF CV PEND ST(2) PRI ST(2) unused (9) 17D8h 17DCh 17F0h 17F4h 17F8h 17FCh PPP un- used Next Descriptor Pointer (16) Next Priority Pending Descriptor Pointer (16) Byte Count (13) Current Packet Data Buffer Address (32) Start Descriptor Pointer (16) CH EN Last Pending Descriptor Pointer (16) Next Pending Descriptor Pointer (16) Next Priority Descriptor Pointer (16) Last Priority Pending Descriptor Pointer (16) DQS unused (16) EOF CV PEND ST(2) PRI ST(2) unused (9) PPP un- used |
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