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DS3134 датащи(PDF) 65 Page - Dallas Semiconductor

номер детали DS3134
подробное описание детали  Chateau Channelized T1 And E1 And HDLC Controller
PDF  203 Pages
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производитель  DALLAS [Dallas Semiconductor]
домашняя страница  https://www.maximintegrated.com/en.html
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DS3134 датащи(HTML) 65 Page - Dallas Semiconductor

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Bits 0 to 7 / Transmit Channel Number (TCH#). The CPU will load the number of the HDLC channel
associated with this particular DS0 channel. If the port is running in an unchannelized mode (TUEN = 1),
then the HDLC Channel Number only needs to be loaded into T[n]CFG0. If the Fast (52 Mbps) HDLC
Engine is enabled on Port 0, then HDLC Channel 1 is assigned to it and likewise HDLC Channel 2 will
be assigned to the Fast HDLC Engine on Port 2 if it is enabled. Hence, these HDLC channel numbers
should not be used if the Fast HDLC Engines are enabled.
00000000 (00h) = HDLC Channel Number 1 (also used for the Fast HDLC Engine on Port 0)
00000001 (01h) = HDLC Channel Number 2 (also used for the Fast HDLC Engine on Port 1)
00000010 (02h) = HDLC Channel Number 3
11111111 (FFh) = HDLC Channel Number 256
Bit 8 / Transmit 56 kbps (T56). If the port is running a channelized application, this bit determines
whether the LSB of each DS0 should be processed or not. If this bit is set, then the LSB of each DS0
channel will not be routed from the HDLC controller (or the BERT if it has been enabled via the RBERT
bit) and the LSB bit position will be forced to a one.
0 = 64 kbps (use all 8 bits in the DS0)
1 = 56 kbps (use only the first 7 bits transmitted in the DS0; force the LSB to one)
Bit 9 / Transmit Force All Ones (TFAO). If this bit is set, then eight ones will be placed into the DS0
channel for transmission instead of the data that is being sourced from the HDLC controller. If this bit is
cleared, then the data from the HDLC controller will be transmitted. This bit is useful in instances when
Channelized Local LoopBack (CLLB) is being activated to keep the looped back data from being sent out
onto the network. This bit overrides TCHEN.
0 = transmit data from the HDLC controller
1 = force transmit data to all ones
Bit 11 / Channelized Network LoopBack Enable (CNLB). Enabling this loopback forces the receive
data to replace the transmit data. This bit must be set for each and every DS0 channel that is to be looped
back. This bit overrides TBERT, TFAO, and TCHEN.
0 = loopback disabled
1 = loopback enabled
Bit 14 / Route Data from BERT (TBERT). Setting this bit will route DS0 data to the TD pin from the
BERT block instead of from the HDLC controller. If the DS0 channel has been configured for 56 kbps
operation (T56 = 1), then the LSB of each DS0 channel will not be routed from the BERT block but will
be forced to a one instead. In order for the data to make it from the BERT block, the Host must also
configure the BERT for the proper port via the Master Control register (see Section 4). This bit overrides
TFAO and TCHEN.
0 = do not route data from BERT
1 = route data from BERT (override the data from the HDLC controller)



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