PC87365 datasheet(155/215 Pages) NSC

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9.0 Voltage Level Monitor (VLM) (Continued)

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Figure 29. Analog Power Supply

9.3.2

Reference Voltage

Analog input voltage is measured relative to (2.45

±0.05)*V

REF.VREF may be either internal or external. When an internal

VREF is used, a capacitor should be connected between the VREF pin and AVSS. The VREF default setting is for external.

This default prevents contention between the internal and external VREF.

Note that the VREF setting is common to both the VLM and the TMS modules. If either of these modules is configured to use

internal reference voltage, the internal reference voltage is used by both modules.

9.4

The VLM uses register banks to enable host access to its registers. The VLM has 10 common registers in addition to four

registers that are located in each of the 10 banks. The common registers include configuration and status information com-

mon to all the channels. Each of the banks is associated with one channel and holds its readout, configuration and status

information. All registers use the same 16-byte address space to indicate offsets 00h through 0Fh. The active bank must be

selected by the software.

The VLM Bank Selection (VLMBS) register, which is common to all banks, selects the active banks (see Figure 30). The

default bank selection after system reset is 0.

Figure 30. Register Bank Architecture

GND

Digital Ground Layer

Power

Analog

AVDD

C4 0.1

C3 0.1

AVSS

Analog Ground Layer

Power

Supply

Ω

AD0

AD6

AD0

AD6

VIN

µF

3.3 V

VREF

0.47

µF

VREF

VSB

Offset 0Bh

Offset 0Eh

Offset 0Fh

VLMBS (09h)

Common

Registers

All Banks

Offset 0Ah

BANK 1

BANK 0

Offset 08h

Offset 00h

for

}

BANK 10

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