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PC87365 датащи(PDF) 27 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали PC87365
подробное описание детали  128-Pin LPC SuperI/O with System Hardware Monitoring
PDF  215 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87365 датащи(HTML) 27 Page - National Semiconductor (TI)

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1.0 Signal/Pin Connection and Description (Continued)
27
www.national.com
1.4.13
Strap Configuration
1.4.14
System Hardware Monitoring
Signal
Pin/s
I/O Buffer Type Power Well
Description
BADDR
101
I
INSTRP
VDD
Base Address. Sampled by the trailing edge of the system reset
to determine the base address of the configuration Index-Data
register pair. During reset, it is pulled down by internal 30 K
resistor.
If no pull-up resistor is connected, it is sampled low, setting the
Index-Data pair at 2Eh-2Fh.
Connecting a 10 K
Ω external pull-up resistor to V
DD would make
it sample high, setting the Index-Data pair at 4Eh-4Fh.
PSLDC0
PSLDC1
99
107
I
INSTRP
VSB
1
1. Make sure that the Serial Port driver is back-drive protected.
Power Supply and LED Configuration. If no pull-up resistor is
connected to these pins, pins 33-35 and 37 function as
PWBTOUT, PSON, PWBTIN and SLPS5,respectively. Connecting
a 10K external pull-up resistor to VSB causes these pins to
function as GPOS0, GPOS1 and GPIS2 and AVI0, respectively.
PSONPOL
109
I
INSTRP
VSB
1
Power Supply On Polarity. If no pull-up resistor is connected to
this pin, PSON is set active low with open-drain output.
Connecting a 10K external pull-up resistor to VSB causes PSON
to be set to active high with push-pull output.
TEST
98
I
INSTRP
VDD
Test. If sampled high on the trailing edge of system reset, this
signal forces the device into test mode. This pin is for National
Semiconductor use only and should be left unconnected.
To put the chip in Test mode, connect an external pull-up to this
pin. Otherwise, leave it unconnected or connected to the UART
transceiver.
Signal
Pin(s)
I/O
Buffer Type Power Well
Description
ALARM
27
O
OD6
VSB
Alarm. Alerts on voltage input mismatch.
AVI0-6
37-43
I
INAN1
AVDD
Analog Voltage Inputs. Analog inputs of the A/D converter.
D1N
D2N
47
49
I
INAN3
AVDD
Diode Cathode. Diodes 1 and 2 return current sink. Must be
grounded when not used.
D1P
D2P
48
50
O
OAN2
AVDD
Diode Anode. Diodes 1 and 2 current source. Connected to
remote discrete diodes.
OTS1
OTS2
24
25
O
OD6
VSB
Overtemperature Shutdown. Indicates that an overtemperature
was detected. See Section 2.9.10, the SuperI/O Configuration A
register, bit 0, for further details on which pin/s is/are active for
remote and local temperature sensing.
VREF
46
I/O
INAN2, OAN1
AVDD
Reference Voltage. Provides reference voltage for the on-chip
A/D circuits. An external reference voltage should be connected to
this input.



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