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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PC87365 датащи(PDF) 157 Page - National Semiconductor (TI) |
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PC87365 датащи(HTML) 157 Page - National Semiconductor (TI) |
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157 / 215 page  9.0 Voltage Level Monitor (VLM) (Continued) 157 www.national.com 9.5.2 Voltage Event Status Register 0 (VEVSTS0) This register indicates which of the corresponding eight VLM events has occurred. Location: Offset 00h Type: RO 9.5.3 Voltage Event Status Register 1 (VEVSTS1) This register indicates which of the corresponding VLM events has occurred. Location: Offset 01h Type: RO Bit 76543210 Name VSB ALARM Event Status AVI6 ALARM Event Status AVI5 ALARM Event Status AVI4 ALARM Event Status AVI3 ALARM Event Status AVI2 ALARM Event Status AVI1 ALARM Event Status AVI0 ALARM Event Status Reset 00000000 Bit Description 7 VSB ALARM Event Status. This channel measures the internal VSB power, using VSB/2. 0: Voltage level within limits (default) 1: High or low limit exceeded 6-0 Analog Voltage Inputs 6-0 ALARM Event Status. 0: Voltage level within limits (default) 1: High or low limit exceeded Bit 765432 1 0 Name Reserved AVDD ALARM Event Status VBAT ALARM Event Status VDD ALARM Event Status Reset 0 00000 0 0 Bit Description 7-3 Reserved. 2 AVDD ALARM Event Status. This channel measures the internal AVDD power, using AVDD/2. 0: Voltage level within limits (default) 1: High or low limit exceeded 1 VBAT ALARM Event Status. This channel measures the VBAT power input. 0: Voltage level within limits (default) 1: High or low limit exceeded 0 VDD ALARM Event Status. This channel measures the internal VDD power, using VDD/2. 0: Voltage level within limits (default) 1: High or low limit exceeded |
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