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9.0

Voltage Level Monitor (VLM)

9.1

OVERVIEW

The Voltage Level Monitor (VLM) is an A/D converter that monitors various voltages in the system, reports their values to

system monitoring software and can set an alarm when any of these voltages is outside a specified range. The VLM con-

forms to LDCM and DMI requirements for system monitoring.

The VLM can sense up to 10 voltage values. Seven sources are external and can be applied per system requirements. Four

values are internal and used for VSB,VDD,VBAT and AVDD.VSB,VDD and AVDD are internally divided by 2 to allow detection

of voltage both over and under the specified range.

The host can query the various voltage readout values and configure the VLM to generate an ALARM signal when the volt-

age is outside a specified range (below ViLOW or above ViHIGH, where i is the channel number). The ALARM can generate

an interrupt internally.

9.2

FUNCTIONAL DESCRIPTION

The VLM incorporates an 8-bit A/D converter and a set of control, configuration and status registers and digital circuitry that

controls its operation. Figure illustrates the structure of the VLM module.

The VLM measures the various input voltages periodically, as defined by the conversion rate setting (see Section 9.5.9). At

the beginning of each period, a measurement trigger is issued, which starts a burst of conversion operations. The burst in-

cludes scanning all enabled channels starting from channel 0.

To guarantee the stability of the signal at the input of the A/D converter, a delay is added between the end of each conversion

and the beginning of the next. The delay between samples should be adjusted according to the resistance and capacitance

of the input source. See Section 9.7.1 for information on how to calculate the sampling delay; see Section 9.5.9 for the as-

sociated programing model.

The voltage readout is an unsigned integer between 0 and 255. Section 9.2.1 describes how the readout is converted to a

voltage value.

The VLM is designed to preserve indication of failures by disabling the conversion whenever the SLPS3 input becomes ac-

tive (i.e., VDD is expected to drop) and whenever an error is detected. The conversion and register updates resume only

after power is restored and normal system operation resumes. To prevent loss of error condition flagging, the conversions

for voltage measurement channels that are out of range are stopped until the ALARM status is cleared. Whenever SLPS3

is not available in the system, the SLPS3 input should be tied to 1 and the software should disable the measurements before

the power fails or ignore and clear any pending error flags after power is restored.

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