CS8952T datasheet(34/86 Pages) CIRRUS

номер детали	CS8952T

подробное описание детали	100BASE E-X AND 10BASE-T TRANSCEIVER

PDF	86 Pages

Scroll/Zoom	100%

производитель	CIRRUS [Cirrus Logic]

домашняя страница	http://www.cirrus.com

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34 / 86 page

DS206TPP2

CS8952T

CrystalLAN™ 100BASE-X and 10BASE-T Transceiver

CIRRUS LOGIC ADVANCED PRODUCT DATABOOK

Basic Mode Status Register - Address 01h (Cont.)

BIT

NAME

TYPE

RESET

DESCRIPTION

Auto-Neg Ability

Read Only

This bit indicates that the CS8952T has auto-negotia-

tion capability. It will always read back a value of 1.

Link Status

Read Only

When set, this bit indicates that a valid link has been

established. Upon a link failure, this bit is cleared and

latched. It will remain cleared until this register is

read.

Jabber Detect

Read Only

In 10BASE-T mode, if the last transmission is longer

than 105 ms, then the packet output is terminated by

the jabber logic and this bit is set. If JabberiE (Inter-

rupt Mask Register (address 10h), bit 3) is set, an MII

Interrupt will be generated.

This bit is implemented with a latching function so

that the occurrence of a jabber condition causes it to

become set until it is cleared by a read to this register,

a read to the Interrupt Status Register (address 11h),

or a reset.

No jabber detect function has been defined for

100BASE-TX.

Extended Capability Read Only

This bit indicates that an extended register set may

be accessed (registers beyond address 01h). This bit

always reads back a value of 1.

CS8952T датащи(PDF) 34 Page - Cirrus Logic