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CS8952T датащи(PDF) 23 Page - Cirrus Logic |
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CS8952T датащи(HTML) 23 Page - Cirrus Logic |
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23 / 86 page ![]() DS206TPP2 23 CS8952T CrystalLAN™ 100BASE-X and 10BASE-T Transceiver CIRRUS LOGIC ADVANCED PRODUCT DATABOOK Auto-Negotiation Configuration At power-up and reset times, the auto-negotiation mode is selected via the auto-negotiation input pins (AN[1:0]). These three-level input pins are sam- pled during power-up or reset. If either of these pins is left unconnected, internal logic pulls its sig- nal to a mid-range value, designated as 'M' in the following table. Either pin may also be connected to a 5 to 25 MHz TTL-level clock source, designat- ed as ‘C’ in the following table. A minimum of 8 rising edges of the clock are required while RESET is asserted for the AN[1:0] input logic to interpret the input as ‘C’. Auto-Negotiation may also be enabled and the ad- vertised capabilities modified under software con- trol through bit 8 of the Basic Mode Control Register (address 00h), and bits 5, 6, 7, 8, and 10 of the Auto-Negotiation Advertisement Register (ad- dress 04h). Auto-Negotiation Operation Auto-Negotiation encapsulates information within a burst of closely spaced Link Integrity Test Pulses, referred to as a Fast Link Pulse (FLP) Burst. The FLP Burst consists of a series of Link Integrity Pulses which form an alternating clock / data se- quence. Extraction of the data bits from the FLP Burst yields a Link Code Word which identifies the capability of the remote device. In order to support legacy 10 and 100 Mb/s devic- es, the CS8952T also supports parallel detection. In parallel detection, the CS8952T monitors activity on the media to determine the capability of the link partner even without auto-negotiation having oc- curred. AN1 pin AN0 pin Forced/Auto Speed Full/Half Duplex 0 M Forced 10 Mb/s Half 1 M Forced 10 Mb/s Full M 0 Forced 100 Mb/s Half M 1 Forced 100 Mb/s Full C M Forced 100 Mb/s Full (Note 1) M C Forced 100 Mb/s Full (Note 2) C C Forced 100 Mb/s Half (Note 3) M M Auto-Neg 100/10 Mb/s Full/Half 0 0 Auto-Neg 10 Mb/s Half 0 1 Auto-Neg 10 Mb/s Full 1 0 Auto-Neg 100 Mb/s Half 1 1 Auto-Neg 100 Mb/s Full C 1 Auto-Neg 100/10 Mb/s Full C 0 Auto-Neg 100/10 Mb/s Half 1 C Auto-Neg 100 Mb/s Full/Half 0 C Auto-Neg 10 Mb/s Full/Half Table 5. Auto-negotiation Mode Selection 1. The Auto-Negotiation Advertisement Register will be modified to advertise 100 Mb/s Full/Half. 2. The Auto-Negotiation Advertisement Register will be modified to advertise 100/10 Mb/s Full. 3. The Auto-Negotiation Advertisement Register will be modified to advertise 100/10 Mb/s Half. |
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