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CS8952T датащи(PDF) 19 Page - Cirrus Logic |
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CS8952T датащи(HTML) 19 Page - Cirrus Logic |
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19 / 86 page ![]() DS206TPP2 19 CS8952T CrystalLAN™ 100BASE-X and 10BASE-T Transceiver CIRRUS LOGIC ADVANCED PRODUCT DATABOOK Table3. 4B5B CodeViolation Decoding Carrier Sense Operation The CRS pin (Carrier Sense) is asserted when ei- ther the transmitter is active or the receiver detects at least two non-contiguous ZEROS within any 10 bits in the received data stream. Once asserted, it will remain asserted until the transmitter has gone idle or the receiver detects 10 consecutive ONES. CRS is not synchronous to RX_CLK. It may tran- sition at any time. Link Integrity Monitor The link integrity monitor determines whether the underlying receive channel is providing reliable data. When auto-negotiation is disabled, the link is con- sidered to be stable when the receiver has detected valid signal levels for at least 1 ms. If the signal levels fall below the minimum for more than 350 us, the Link Status bit in the Basic Mode Status Register (address 01h) is cleared, the Link Status Change bit in the Interrupt Status Register (address 11h) is set, and the Disconnect Count Register (ad- dress 12h) is incremented. When auto-negotiation is enabled, the link will be further qualified by the detection 100BASE-X mode and 12 consecutive IDLE code groups. Collision Detection For half duplex, a collision is detected when the re- ceiver and transmitter are active simultaneously. Collisions are reported by asserting the COL pin. Code Violations (RX_ER = 1 or TX_ER = 1) Name 5-bit Symbol Normal Mode 4-bit Nibble Error Report Mode 4-bit Nibble Comments CONTROL (Note 1) 1. CONTROL code groups become violations when found in the data portion of the frame. I 11111 0000 0000 This portion of the table relates received 5-bit symbols to received 4-bit nibbles only. The control code groups may not be transmitted in the data portion of the frame. J 11000 0000 0000 K 10001 0000 0000 T 01101 0000 0000 R 00111 0000 0000 CODE VIOLATIONS H 00100 0000 0000 V0 00000 0110 or 0101 (Note 2) 2. Invalid code groups are mapped to 5h unless the Code Error Report select bit in the Loopback, Bypass, and Receiver Error Mask Register (address 18h) is set, in which case invalid code groups are mapped to 6h. 0001 V1 00001 0110 or 0101 (Note 2) 0111 V2 00010 0110 or 0101 (Note 2) 1000 V3 00011 0110 or 0101 (Note 2) 1001 V4 00101 0110 or 0101 (Note 2) 1010 V5 00110 0110 or 0101 (Note 2) 1011 V6 01000 0110 or 0101 (Note 2) 1100 V7 01100 0110 or 0101 (Note 2) 1101 V8 10000 0110 or 0101 (Note 2) 1110 V9 11001 0110 or 0101 (Note 2) 1111 |
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