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3.7.2

GPIO Pin Function After Device Is Programmed

3.8 Input and Output Serial Audio Ports

TAS3108, TAS3108IA

AUDIO DIGITAL SIGNAL PROCESSORS

SLES152B – OCTOBER 2005 – REVISED NOVEMBER 2007

longer driving the GPIO pin low after the load has completed (~100 ms following a reset if no EEPROM

is present), the state of the GPIO pin can be observed.

Then the system controller can access the TAS3108/TAS3108IA through the I2C interface and read the

status register to determine the load status.

If the GPIO pin state is not observed, the only indication that the device has completed its initialization

procedure is that the TAS3108/TAS3108IA streams audio and the I2C slave interface has been enabled.

Once the TAS3108/TAS3108IA has been programmed, either through a successful boot load or via slave

I2C download, the operation of GPIO can be programmed to be an input and/or output.

The TAS3108/TAS3108IA supports system architectures that require data format conversions between

TDM and non-TDM of the same format type without the need for additional glue logic. In addition, the

TAS3108/TAS3108IA supports data format conversions between right justified and I2S and between left

justified and I2S. All the supported conversions are listed in Table 3-1. If the input port is configured for a

TDM format, only SDIN1 is active. If a TDM format is selected for the output port, only SDOUT1 is active.

Table 3-1. Supported Conversions

INPUT SAP

OUTPUT SAP

(SDIN1, SDIN2, SDIN3, SDIN4)

(SDOUT1, SDOUT2, SDOUT3, SDOUT4)

2 channel left justified

TDM left justified

2 channel left justified

2 channel I2S

TDM left justified

2 channel left justified

2 channel I2S

TDM I2S

2 channel I2S

2 channel leftjustified

2 channel I2S

2 channel right justified

2 channel I2S

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Physical Characteristics

Not Recommended for New Designs

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