TAS3108DCPR datasheet(2/63 Pages) TI1

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Contents

TAS3108, TAS3108IA

AUDIO DIGITAL SIGNAL PROCESSORS

SLES152B – OCTOBER 2005 – REVISED NOVEMBER 2007

Introduction

............................................... 1

2C Register Map

........................................ 37

1.1

Features

.............................................. 1

7.1

Clock Control Register (0x00)

...................... 38

1.2

Applications

........................................... 1

7.2

Status Register (0x02)

.............................. 41

7.3

I2C Memory Load Control and Data Registers (0x04

Functional Description

................................. 3

and 0x05)

............................................ 42

2.1

Device Description

.................................... 3

7.4

Memory Access Registers (0x06 and 0x07)

........ 43

2.2

Power Supply

......................................... 4

Electrical Specifications

.............................. 44

2.3

Clock Control

......................................... 4

8.1

Absolute Maximum Ratings Over Operating

2.4

Serial Audio Ports (SAPs)

............................ 4

Temperature Range (unless otherwise noted)

...... 44

2.5

M8051Warp Microprocessor

.......................... 4

8.2

Package Dissipation Ratings

2.6

I2C Control Interface

.................................. 4

(TAS3108/TAS3108IA)

.............................. 44

2.7

Audio DSP Core

...................................... 5

8.3

Recommended Operating Conditions

(TAS3108/TAS3108IA)

.............................. 44

Physical Characteristics

............................... 6

8.4

Electrical Characteristics (TAS3108/TAS3108IA)

... 45

3.1

Terminal Assignments

................................ 6

8.5

Timing Characteristics

............................... 46

3.2

Terminal Descriptions

................................ 7

8.5.1

Master Clock Signals (TAS3108/TAS3108IA)

..... 46

3.3

Reset (RESET)

....................................... 7

8.5.2

Serial Audio Port Slave Mode Signals

3.4

Power-On Reset (RESET)

............................ 8

(TAS3108/TAS3108IA)

.............................. 47

3.5

Power Down (PDN)

................................... 8

8.5.3

Serial Audio Port Master Mode Signals

3.6

I2C Bus Control (CS0)

................................ 8

(TAS3108/TAS3108IA)

.............................. 48

3.7

Programmable General Purpose I/O (GPIO)

......... 8

8.5.4

Pin-Related Characteristics of the SDA and SCL

3.8

Input and Output Serial Audio Ports

.................. 9

I/O Stages for F/S-Mode I2C-Bus Devices

.......... 49

Algorithm and Software Development Tools for

8.5.6

Reset Timing (TAS3108/TAS3108IA)

.............. 51

TAS3108/TAS3108IA

................................... 18

Application Information

............................... 53

Clock Controls

.......................................... 19

9.1

Schematics

.......................................... 53

Microprocessor Controller

.......................... 27

9.2

Recommended Oscillator Circuit

.................... 55

6.1

General I2C Operations

............................. 28

9.3

Recommended PCB Design for TAS3108IA

6.2

Detailed I2C Operation

.............................. 29

Applications

......................................... 55

6.3

I2C Master-Mode Device Initialization

.............. 31

Contents

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