TAS3108DCPR datasheet(3/63 Pages) TI1

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Functional Description

2.1 Device Description

Microprocessor Core

Data

Path

Memory

Interface

Volume

Update

Audio DSP Core

Serial

Audio

Port

Controller

I2C

Control

Interface

SDIN1

SDIN2

SDOUT1

8 Channels

SDIN3

SDIN4

SDOUT2

SDOUT3

SDOUT4

Coef.

RAM

(1022 y 28)

Data

RAM

(1022 y 48)

Code

RAM

(3K y 54)

Clock

Control

MCLK

LRCLK

SCLKIN

SCLKOUT1

SCLKOUT2

Delay

Memory

(5.8K y 24)

2ySDA

2ySCL

CSO

GPIO

Internal

Data RAM

(256 y 8)

Code

RAM

(12K y 8)

External

Data RAM

(2048 y 8)

Code

ROM

8-Bit

MCU

(8051)

Control

Registers

B0075-01

Power Supply

AVDD

DVDD

TAS3108, TAS3108IA

AUDIO DIGITAL SIGNAL PROCESSORS

SLES152B – OCTOBER 2005 – REVISED NOVEMBER 2007

The TAS3108 and TAS3108IA are fully programmable high-performance audio processors. The devices

use an efficient, custom, multi-instruction programming environment optimized for digital audio processing

algorithms. The TAS3108/TAS3108IA architecture provides high-quality audio processing by using a 48-bit

data path, 28-bit filter coefficients, and a single-cycle 28

× 48-bit multiplier with a 76-bit accumulator. An

embedded 8051 microprocessor provides algorithm and data control for the TAS3108/TAS3108IA. The

TAS3108 is the commercial version intended for home audio and other commercial applications. The

TAS3108IA is the automotive version that is qualified for use in automotive applications.

Figure 2-1. Expanded TAS3108/TAS3108IA Functional Block Diagram

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Functional Description

Not Recommended for New Designs

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