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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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VX6953CB датащи(PDF) 48 Page - STMicroelectronics |
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VX6953CB датащи(HTML) 48 Page - STMicroelectronics |
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48 / 107 page  Video data interface VX6953CB 48/107 8209023 Rev 5 5 Video data interface The video stream which is output from the VX6953CB through the compact camera port (CCP) or camera serial interface (CSI) contains both video data and other auxiliary information. This chapter describes the frame formats. The VX6953CB is SMIA version 1.0 and MIPI CSI-2 version 1.00 and D-PHY v1.00 compliant meaning it is compatible with both v0.90 and v1.00 D-PHY receivers. The selection of the video data format is controlled using the register CSI_SIGNALLING_MODE (0x0111): 0 - CCP2 data/clock 1 - CCP2 data/strobe 2 - CSI-2 (default) Changing the video data format must be performed when the sensor is in software standby. The VX6953CB has one CSI-2 data lane capable of transmitting at 800 Mbps. However, while in CCP2 interface the maximum data rate is 640 Mbps. The CSI-2 data lane transmitter supports: • Unidirectional master • HS-TX • LP-TX (ULPS) • CIL-MUYN function The CSI-2 clock lane transmitter supports: • Unidirectional master • HS-TX • LP-TX (ULPS) • CIL-MCNN function 5.1 Frame format The frame format for the VX6953CB is described by the frame format descriptors, see Table 10 on page 30. For CCP this results in a frame as shown in Figure 12 and for CSI it results in a frame as shown in Figure 13. |
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