VX6953CB datasheet(46/107 Pages) STMICROELECTRONICS

46 / 107 page

VX6953CB

46/107

8209023 Rev 5

4.20

Image scaling parameter limit registers [0x1200 to 0x120B]

4.21

Image compression parameter registers [0x1300 to 0x13FF]

4.22

CSI lane mode capability [0x1600 to 0x1602]

4.23

Binning capability [0x1700 to 0x170B]

Table 28. Image scaling parameter limit registers [0x1200 to 0x120B]

Index Byte

Data type Default Type

Comment

0x1200 Hi

scaling_capablility

16UI

00.02

VX6953CB supports full (horizontal

and vertical) scaling.

0x1201 Lo

Table 29. Image compression parameter limit registers [0x1300 to 0x13FF]

Index Byte

Data type Default Type

Comment

0x1300 Hi

compression_capablility

16UI

00.01

VX6953CB supports DPCM/PCM

compression

0x1301 Lo

Table 30. CSI lane mode capability registers [0x1600 - 0x1602]

Index Byte

Data type Default Type

Comment

0x1600

ui_and_manual_dphy_ctrl_ca

pability

8UI

CSI2 DPHY control capability

UI enough

0x1601

csi_lane_capability

8UI

RO One CSI-2 data lane supported

0x1602

csi_signallingmode_capability

8UI

Number of data lanes available.

Bit[0]:

1 = CCP2 Data/Clock supported.

0 = Not supported.

Bit[1]:

1 = CCP2 Data/Strobe supported.

0 = Not supported.

Bit[2]:

1 = CSI2 supported.

0 = Not supported.

Table 31. Binning capability registers [0x1700 to 0x170B]

Index

Byte

Data type Default Type

Comment

0x1700

binning_capability

8UI

RO VX6953CB supports binning

0x170B

binning_weighting_capability

8UI

VX6953CB supports averaged and

Bayer corrected weighting

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