VX6953CB datasheet(19/107 Pages) STMICROELECTRONICS

19 / 107 page

8209023 Rev 5

19/107

VX6953CB

Functional description

3.3.1

Power off

Power supplies are off.

3.3.2

Hardware standby

This is the lowest power consumption mode. CCI communications are not supported in this

mode. The clock input pad, PLL and the video blocks are powered down. This state is

entered by pulling the control pin XSHUTDOWN down. All registers are returned to their

default values.

3.3.3

Software standby

Software standby mode preserves the contents of the CCI register map. CCI

communications are supported in this mode. The software standby mode is selected using a

serial interface command. If this state is entered from hardware standby, the data pads

remain high impedance. If this state is entered from streaming, then the data pads go high

impedance at the end of the current frame. At this point, the video block and PLL power

down. The internal video timing is reset to the start of a video frame in preparation for the

enabling of active video. The values of the serial interface registers like exposure and gain

are preserved. The system clock must remain active when communicating with the sensor.

This state is entered by releasing the device from hard reset by: setting XSHUTDOWN high,

writing 0x00 to the mode control register (0x0100) or commanding a soft reset by writing

0x01 to the software reset register (0x0103). After a soft reset or the transition of

XSHUTDOWN to high, all registers are returned to their default values.

3.3.4

Streaming

The VX6953CB streams live video. This mode is entered by writing 0x01 to the mode

control register (0x0100).

3.4

Power management

VX6953CB requires a dual power supply. The analog circuits are powered by a nominal

2.8V supply while the digital logic and digital I/O are powered by a 1.8V supply. Different

sections of the sensor are powered depending on the system state. See Table 4 for details.

Table 4. Power management matrix

Mode

Functional block powered down

Video data

inhibit

CCI

Digital

Internal

and output

clocks(1)

1. PLL block and data CLK+ and CLK- pins

Output

pins

Analog

Hardware

standby

Yes

Software standby

Yes

Streaming

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