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VX6953CB датащи(PDF) 28 Page - STMicroelectronics |
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VX6953CB датащи(HTML) 28 Page - STMicroelectronics |
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28 / 107 page ![]() Functional description VX6953CB 28/107 8209023 Rev 5 3.6.2 CSI-2 serial data link Data signals (DATA+ and DATA-) and clock signals (CLK+ and CLK-) are transferred from VX6953CB on two pairs of balanced 100 Ω impedance transmission lines. The physical layer of the interface is the MIPI Alliance Standard D-PHY. The transmission line pairs and custom transmitters/receivers realize a very low voltage differential (subLVDS) signalling scheme that can transfer information in a potentially noisy environment. As implemented in VX6953CB, the CSI-2 link supports the transmission of raw Bayer data at 5.0 Mpixel resolution up to 15 frame/s at 10-bit resolution and up to 16.65 fps. in 10-8 bit compressed data format. It is to be noted that image quality between RAW10 and 10-8 bits format is very similar. Figure 11. CSI serial data link 3.6.3 CCI serial control bus The internal registers in VX6953CB can be configured by a master device using a CCI bus (SDA, SCL). VX6953CB sends and receives commands over this bus at up to 400 kb/s. The CCI bus uses a device address of 0x20 for writes and 0x21 for reads. MSCL Data+ Data- Clock- Clock+ Data+ Data- Clock- Clock+ CSI RX HOST CSI TX Camera transmitter SSCL MSDA SSDA CCI master CCI slave |
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