VX6953CB datasheet(61/107 Pages) STMICROELECTRONICS

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8209023 Rev 5

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VX6953CB

Video timing

FIFO

The FIFO is used to implement the data rate reduction required for profile 1 and 2 operation.

The concept of an output frame length and a line length for the output timing domain does

not exist for SMIA devices such as the VX6953CB. This is a result of the FIFO input data

patterns being different depending on scaling factor and if the data is co-sited or Bayer

sampled, which results in variable interframe and interline blanking time between lines and

between frames.

Figure 23. SMIA output timing

When the FIFO reaches a certain level of usage the CCP transmitter starts outputting a line

containing x_output_size pixels. This then naturally tracks any variation in the input data

rate, if the water mark is set correctly underflow is not possible.

Figure 24. FIFO water mark control

If the derating factor >= downscale factor then the average input rate of a burst of a line of

scaler output data into the FIFO is always faster than the output data rate, in this case the

fifo_water_mark_pixels can be set to eight as the FIFO input data rate is always faster than

the FIFO output data rate.

If the derating factor < downscale factor then the average input rate of a burst of a line of

scaler output data into the FIFO is slower than the output data rate, in this case the

fifo_water_mark_pixels must be set to avoid underflow.

Output data:

2608 pixels

1960 lines

Output line length

(Does not exist in SMIA)

CCP active video

Line blanking

FIFO Water Mark Level = CCP Output Trigger

FIFO

Usage

LE CS

DATA

x_output_size + additional_cols

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