MEC1322 datasheet(211/456 Pages) MICROCHIP

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 2014 - 2015 Microchip Technology Inc.

DS00001719D-page 211

MEC1322

15.9.9

GIRQ16

15.9.10

GIRQ17

MBX_DATA

Interrupt generated for Host writes to Mailbox Data Regis-

ter

[30:17]

Reserved

n/a

See Table 15-7, "GIRQx Source Register", Table 15-8,

"GIRQx Enable Set Register", Table 15-10, "GIRQx

Enable Clear Register", and Table 15-9, "GIRQx Result

and Result registers.

TABLE 15-19: BIT DEFINITIONS FOR GIRQ16 SOURCE, ENABLE, AND RESULT REGISTERS

Bit

Block Instance

Name

Source Name

Wake

Source Description

[2:0]

Reserved

PECIHOST

NPECI Host

[30:4]

Reserved

n/a

See Table 15-7, "GIRQx Source Register", Table 15-8,

"GIRQx Enable Set Register", Table 15-10, "GIRQx

Enable Clear Register", and Table 15-9, "GIRQx Result

and Result registers.

TABLE 15-20: BIT DEFINITIONS FOR GIRQ17 SOURCE, ENABLE, AND RESULT REGISTERS

Bit

Block Instance

Name

Source Name

Wake

Source Description

IRQ_TACH0

TACH

This internal signal is generated from the OR’d result of

the status events, as defined in the TACHx Status Regis-

ter..

IRQ_TACH1

TACH

This internal signal is generated from the OR’d result of

the status events, as defined in the TACHx Status Regis-

ter.

PS2_0_WK

PS2_DAT0 pin

PS2_0 Start Detect from pin signal PS2_DAT0 (see

Note 15-2 on page 215).

PS2_1_WK

PS2_DAT1 pin

PS2_1 Start Detect from pin signal PS2_DAT1 (see

Note 15-2 on page 215).

PS2_2_WK

PS2_DAT2 pin

PS2_2 Start Detect from pin signal PS2_DAT2 (see

Note 15-2 on page 215).

PS2_3_WK

PS2_DAT3 pin

PS2_3 Start Detect from pin signal PS2_DAT3 (see

Note 15-2 on page 215).

BC_INT_N_WK

BC_LINK

Interrupt from the BC_LINK Companion BC_INT# pin

(see Note 15-2 on page 215).

[9:7]

Reserved

ADC_SNGL

ADC_Single_Int

Interrupt signal from ADC controller to EC for Single-

Sample ADC conversion

ADC_RPT

ADC_Repeat_Int

Interrupt signal from ADC controller to EC for Repeated

ADC conversion

MCHP Reserved

TABLE 15-18: BIT DEFINITIONS FOR GIRQ15 SOURCE, ENABLE, AND RESULT REGISTERS

Bit

Block Instance

Name

Source Name

Wake

Source Description

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