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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MEC1322 датащи(PDF) 210 Page - Microchip Technology |
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MEC1322 датащи(HTML) 210 Page - Microchip Technology |
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210 / 456 page  MEC1322 DS00001719D-page 210 2014 - 2015 Microchip Technology Inc. 15.9.7 GIRQ14 15.9.8 GIRQ15 31 n/a n/a N See Table 15-7, "GIRQx Source Register", Table 15-8, "GIRQx Enable Set Register", Table 15-10, "GIRQx Enable Clear Register", and Table 15-9, "GIRQx Result Register" for a definition of this bit for the Source, Enable, and Result registers. TABLE 15-17: BIT DEFINITIONS FOR GIRQ14 SOURCE, ENABLE, AND RESULT REGISTERS Bit Block Instance Name Source Name Wake Source Description [1:0] Reserved Reserved N Reserved 2 IRQ_LPC LPC_INTER- NAL_ERR N The LPC_INTERNAL_ERR event is sourced by bit D0 of the Host Bus Error Register. [30:3] Reserved Reserved N Reserved 31 n/a n/a N See Table 15-7, "GIRQx Source Register", Table 15-8, "GIRQx Enable Set Register", Table 15-10, "GIRQx Enable Clear Register", and Table 15-9, "GIRQx Result Register" for a definition of this bit for the Source, Enable, and Result registers. TABLE 15-18: BIT DEFINITIONS FOR GIRQ15 SOURCE, ENABLE, AND RESULT REGISTERS Bit Block Instance Name Source Name Wake Source Description 0UART_0 UART N The UART interrupt event output indicates if an interrupt is pending. See Table 14-13, “Interrupt Control Table,” on page 186. 1 Reserved Reserved N Reserved 2EMI_0 Host-to-EC N Communication event notifying the embedded controller that the host has written to the Host-to-EC register. 5:3 Reserved Reserved N Reserved 6 ACPI_EC[0] IBF EC_IBF N EC_IBF interrupt is asserted when the IBF in the STATUS EC-Register is set to ‘1’. 7 ACPI_EC[0] OBF EC_OBF N EC_OBF interrupt is asserted when the OBF in the STA- TUS EC-Register is cleared to ‘0’. 8 ACPI_EC[1] IBF EC_IBF N EC_IBF interrupt is asserted when the IBF in the STATUS EC-Register is set to ‘1’. 9 ACPI_EC[1] OBF EC_OBF N EC_OBF interrupt is asserted when the OBF in the STA- TUS EC-Register is cleared to ‘0’. 10 ACPI_PM1_CTL ACPIPM1_CTL N PM1_CTL2 written by Host 11 ACPIPM1 EN ACPIPM1_EN N PM1_EN2 written by Host 12 ACPIPM1 STS ACPIPM1_STS N PM1_STS2 written by Host 13 8042EM OBF 8042EM_OBF N Interrupt generated by the host reading either data or aux data from the data register 14 8042EM IBF 8042EM_IBF N Interrupt generated by the host writing either data or com- mand to the data register 15 MBX MBX Host-to-EC N Interrupt generated for HOST-to-EC events for writes to the HOST-to-EC Mailbox Register TABLE 15-16: BIT DEFINITIONS FOR GIRQ13 SOURCE, ENABLE, AND RESULT REGISTERS Bit Block Instance Name Source Name Wake Source Description |
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