ACT5880 datasheet(12/87 Pages) ACTIVE-SEMI

12 / 87 page

ACT5880

Rev 2, 03-Sep-13

- 12 -

www.active-semi.com

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TM and ActivePathTM are trademarks of Active-Semi.

I2CTM is a trademark of NXP.

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Figure 1:

I2C Compatible Serial Bus Timing

(VVSYS = 3.6V, TA = 25°C, unless otherwise specified.)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SCL, SDA Input Low

VVSYS = 3.1V to 5.5V, TA = -40ºC to 85ºC

0.4

SCL, SDA Input High

VVSYS = 3.1V to 5.5V, TA = -40ºC to 85ºC

1.4

SCL, SDA Leakage Current

µA

SDA Output Low

IOL = 5mA

0.3

SCL Clock Period, tSCL

1.5

µs

SDA Data Setup Time, tSU

100

SDA Data Hold Time, tHD

300

Start Setup Time, tST

For Start Condition

100

Stop Setup Time, tSP

For Stop Condition

100

I2C INTERFACE ELECTRICAL CHARACTERISTICS

SDA

SCL

tST

tSU

tHD

tSP

tSCL

Start

condition

Stop

condition

Note:

Each session of data transfer is with a start condition, a 7-bits slave address plus a bit to instruct for read or write, fol-

lowed by an acknowledge bit, a register address byte followed by an acknowledge bit, and a data byte followed by an

acknowledge bit and a stop condition. The device address, the register address and the data are all MSB first transferred.

Each bit volume is prepared during the SCL is low, is latched-in by the rising edge of the SCL. The data byte is accepted

and is put effective by the time that the last bit volume is latched-in.

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