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ACT5880 датащи(PDF) 19 Page - Active-Semi, Inc |
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ACT5880 датащи(HTML) 19 Page - Active-Semi, Inc |
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19 / 87 page ![]() ACT5880 Rev 2, 03-Sep-13 - 19 - www.active-semi.com ActivePMU TM and ActivePathTM are trademarks of Active-Semi. I2CTM is a trademark of NXP. Copyright © 2013 Active-Semi, Inc. Active-Semi Confidential―Do Not Copy or Distribute REGISTER AND BIT DESCRIPTIONS CONT’D BLOCK ADDRESS and BIT NAME DEFAULT and ACCESS DESCRIPTION SYS 0x6C 7 RFU x WE/R Reserved for future use. 6 RFU x WE/R Reserved for future use. 5 STB 0 W/R Write and read for different functions, as flag bit or mask bit, for the HFPWR assertion interrupt. Write 1 allow interrupt, write 0 mask interrupt; Read 1 when interrupt asserted, 0 if no interrupt. Also see DATAB[ ], POSB[ ] and NEGB[ ] for the status and conditions. 4 STA 1 W/R Write and read for different functions, as flag bit or mask bit, for the "enable key" push-button assertion interrupt. Write 1 allow interrupt, write 0 mask interrupt; Read 1 when interrupt asserted, 0 if no interrupt. Also see DATAA[ ], POSA[ ] for the status and conditions. 3 RFU x WE/R Reserved for future use. 2 RFU x 1 DATAB 0 0 DATAA 0 0x6D 7 RFU x WE/R Reserved for future use. 6 RFU x WE/R Reserved for future use. 5 POSB 0 W/R This bit needs to be set 1 for asserting interrupt when HFPWR asserted. 4 POSA 1 W/R This bit needs to be set 1 for asserting interrupt when "enable key" asserted. 3 RFU x WE/R Reserved for future use. 2 RFU x 1 NEGB 0 0 RFU x Reserved for future use. This bit needs to be set 1 for asserting interrupt when HFPWR asserted. This bit needs to be set 1 for asserting interrupt when "enable key" asserted. Reserved for future use. This bit needs to be set 1 for asserting interrupt when HFPWR de-asserted. Reserved for future use. WE/R W/R W/R WE/R W/R WE/R Note: W/R: Write and read accessible. R: Read accessible, writing to the bit does not make change to the volume. WE/R: Write and read accessible, write exact what it is before to avoid unexpected behavior. X is uncertain volume. |
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