ACT5880 datasheet(66/87 Pages) ACTIVE-SEMI

66 / 87 page

ACT5880

Rev 2, 03-Sep-13

- 66 -

www.active-semi.com

ActivePMU

TM and ActivePathTM are trademarks of Active-Semi.

I2CTM is a trademark of NXP.

Active-Semi Confidential―Do Not Copy or Distribute

General Description

The step-up DC/DC regulator in the ACT5880 is

factory-programmable for the options of operation in

voltage regulation mode, constant current mode

and negative output mode, which are options

against ordering.

The step-up DC/DC has 80ns typical minimum on-

time and 40ns minimum off-time, with the flexible

factory programmable loop compensation and slope

compensation, could output in large dynamic range

from slightly high than input to 40V.

The output voltage in voltage regulation mode and

the over voltage protection threshold, the switch

operation to the system clock phase alignment, and

the turn-on delay time are configurable though the

I2C interface. The circuit is enabled and starts to

output after the specified turn-on delay when the

ON[ ] bit is set to 1. When the ON[ ] is cleared, the

step-up DC/DC circuit is shutdown.

When the interrupt function is not masked and the

power ok condition is not met, the circuit asserts

interrupt. The power ok condition for the voltage

regulation mode is that the output voltage is within

7% of the normal output voltage. For the constant

current mode, the power ok condition is the over-

voltage does not occur. The interrupt function is

masked by setting the nFLTMSK[ ] bit. The over-

voltage detection monitors the voltage seen at

voltage feedback error amplifier input, with an

threshold about 30mV to the 1.2V reference

voltage.

When the on-time or off-time of the switching is

close to the respective minimums, pulse-skipping

happens to stay in regulation, which is normal when

the input voltage and the output voltage are too

close or too far.

See the STEP-UP DC/DC VOLTAGE SETTING

table for VSET code to voltage cross. This code to

voltage cross applies to both the output voltage and

the over voltage threshold.

Voltage Regulation Option

In voltage regulation mode operation, the output is

sampled at the OUT3 pin with an internal divider

network. Figure 5 shows the internal block diagram

and the external circuit for the step-up DC/DC in

voltage regulation mode.

Current Regulation Option

In current regulation mode operation, the current is

sensed in the sinking path at the low end current

sense resistor tap. The voltage on the sense

resistor is regulated at 200mV, the output current is

then derived from the resistance and this 200mV

volume. Figure 6 shows the internal block diagram

and the external circuit for constant current

operation.

The output current can be controlled by feeding a

voltage DIMMING into the resistive network

composed of RCS, RDM1 and RDM2. The

DIMMING voltage can be an analogue signal or a

logic signal, which implements analogue current

control or PWM on/off control to the current output.

When using a logic signal as DIMMING for turning

on and off the constant current output, the on and

off delay limits the maximum available frequency

used for dimming, which is typically less than

2.2kHz. Refer to the waveform captures in

TYPICAL

PERFORMANCE

CHARACTERISTIC

section for more details.

Figure 5:

The REG3 Circuit for Voltage Regulation Mode.

Figure 6:

The REG3 Circuit for Current Mode.

CONFIGURABLE STEP-UP DC/DC REGULATOR

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