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AMC7812SPAPR датащи(PDF) 67 Page - Texas Instruments |
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AMC7812SPAPR датащи(HTML) 67 Page - Texas Instruments |
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67 / 92 page ![]() AMC7812 www.ti.com SBAS513E – JANUARY 2011 – REVISED SEPTEMBER 2013 AMC CONFIGURATION REGISTER 1 (Read/Write, Address = 4Dh, Default = 0070h) Table 17. AMC Configuration Register 1 BIT NAME DEFAULT R/W DESCRIPTION 15 — 0 R Reserved. Writing to this bit causes no change. Reading this bit returns '0'. 14 — 0 R Reserved. Writing to this bit causes no change. Reading this bit returns '0'. 13 — 0 R Reserved. Writing to this bit causes no change. Reading this bit returns '0'. 12 — 0 R Reserved. Writing to this bit causes no change. Reading this bit returns '0'. 11 — 0 R Reserved. Writing to this bit causes no change. Reading this bit returns '0'. 10 — 0 R Reserved. Writing to this bit causes no change. Reading this bit returns '0'. 9 CONV-RATE-1 0 R/W ADC conversion rate bit. See Table 18. 8 CONV-RATE-0 0 R/W ADC conversion rate bit. See Table 18. 7 CH-FALR- CT-2 0 R/W False alarm protection bit for CH0 to CH3. See Table 19. 6 CH-FALR- CT-1 1 R/W False alarm protection bit for CH0 to CH3. See Table 19. 5 CH-FALR- CT-0 1 R/W False alarm protection bit for CH0 to CH3. See Table 19. 4 TEMP-FALR- CT-1 1 R/W False alarm protection bit for temperature monitor. See Table 20. 3 TEMP-FALR- CT-0 0 R/W False alarm protection bit for temperature monitor. See Table 20. 2 — 0 R Reserved. Writing to this bit causes no change. Reading this bit returns '0'. 1 — 0 R Reserved. Writing to this bit causes no change. Reading this bit returns '0'. 0 — 0 R Reserved. Writing to this bit causes no change. Reading this bit returns '0'. Table 18. CONV-RATE-[1:0] Bit Settings CONV-RATE-1 CONV-RATE-0 ADC CONVERSION RATE 0 0 500 kSPS, the specified rate (default) 0 1 ½ of the specified rate 1 0 1/4 of the specified rate 1 1 1/8 of the specified rate Table 19. CH-FALR-CT-[2:0] Bit Settings N CONSECUTIVE SAMPLES CH-FALR-CT-2 CH-FALR-CT-1 CH-FALR-CT-0 BEFORE ALARM IS SET 0 0 0 1 0 0 1 4 0 1 0 8 0 1 1 16 (default for CH-0 to CH-3) 1 0 0 32 1 0 1 64 1 1 0 128 1 1 1 256 Table 20. TEMP-FALR-CT-[1:0] Bit Settings TEMP-FALR-CT-1 TEMP-FALR-CT-0 N CONSECUTIVE SAMPLES BEFORE ALARM IS SET 0 0 1 0 1 2 1 0 4 (default) 1 1 8 Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 67 Product Folder Links: AMC7812 |
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