AMC7812SPAPR datasheet(48/92 Pages) TI

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GPIO-n

ENABLE

GPIO-nBit

(whenwriting)

V+

GPIO-nBit

(whenreading)

AMC7812

SBAS513E – JANUARY 2011 – REVISED SEPTEMBER 2013

www.ti.com

GENERAL-PURPOSE INPUT/OUTPUT PINS (GPIO-0 to GPIO-7)

The AMC7812 has eight GPIO pins. The GPIO-0, -1, -2 and -3 pins are dedicated to general, bidirectional, digital

I/O signals. GPIO-4, GPIO-5, GPIO-6 and GPIO-7 are dual-function pins and can be programmed as either

bidirectional digital I/O pins or remote temperature sensors D1 and D2. When D1 or D2 is disabled, the pins work

as a GPIO. These pins can receive an input or produce an output. When the GPIO-n pin acts as an output, it has

an open-drain, and the status is determined by the corresponding GPIO-n bit of the GPIO Register. The output

state is high impedance when the GPIO-n bit is set to '1', and is logic low when the GPIO-n bit is cleared ('0').

Note that a 10k

Ω pullup resistor is required when using the GPIO-n pin as an output, see Figure 99. The dual

function GPIO-4, -5, -6 and -7 pins should not be tied to a pullup voltage that exceeds the AVDD supply. The

dedicated GPIO-0, -1, -2 and -3 pins are only restricted by the absolute maximum voltage. To use the GPIO-n

pin as an input, the corresponding GPIO-n bits in the GPIO Register must be set to '1'. When the GPIO-n pin

acts as input, the digital value on the pin is acquired by reading the corresponding GPIO-n bit. After a power-on

reset or any forced hardware or software reset, all GPIO-n bits are set to '1', and the GPIO-n pin goes to a high-

impedance state.

Figure 99. GPIO Pins

HARDWARE RESET

Pulling the RESET pin low performs a hardware reset. When the RESET pin is low, the device enters a reset

state, all registers are set to the default values (including the Power-Down Register); therefore, all function blocks

(except the internal temperature sensor) are in power-down mode. On the rising edge of RESET, the device

returns to the normal operating mode. After returning, all registers remain set to the default value until a new

value is written. Note that after reset, it is important to properly write to the power-down register in order to

activate the device. Hardware reset should only be issued when DVDD has reached the minimum specification of

2.7V or above.

SOFTWARE RESET

Software reset returns all register settings to their default and can be performed by writing to the Software Reset

case of SPI communications, only writing the specific value of 6600h to this register resets the device. See the

Registers section for details. During reset, all communication is blocked. After issuing the reset, the user should

wait at least 30µs before attempting to resume communication.

POWER-ON RESET (POR)

When powered on, the internal POR circuit invokes a power-on reset, which performs the equivalent function of

the RESET pin. To ensure a POR, DVDD must start from a level below 750mV.

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