MC68331TS datasheet(63/84 Pages) FREESCALE

63 / 84 page

MC68331TS/D

Figure 14 QSPI RAM

Once the CPU has set up the queue of QSPI commands and enabled the QSPI, the QSPI can operate

independently of the CPU. The QSPI executes all of the commands in its queue, sets a flag indicating

that it is finished, and then either interrupts the CPU or waits for CPU intervention. It is possible to ex-

ecute a queue of commands repeatedly without CPU intervention.

RR[0:F] — Receive Data RAM

$YFFD00

Data received by the QSPI is stored in this segment. The CPU reads this segment to retrieve data from

the QSPI. Data stored in receive RAM is right-justified. Unused bits in a receive queue entry are set to

zero by the QSPI upon completion of the individual queue entry. The CPU can access the data using

byte, word, or long-word addressing.

The CPTQP value in SPSR shows which queue entries have been executed. The CPU uses this infor-

mation to determine which locations in receive RAM contain valid data before reading them.

TR[0:F] — Transmit Data RAM

$YFFD20

Data that is to be transmitted by the QSPI is stored in this segment. The CPU usually writes one word

of data into this segment for each queue command to be executed.

Information to be transmitted must be written to transmit data RAM in a right-justified format. The QSPI

cannot modify information in the transmit data RAM. The QSPI copies the information to its data serial-

izer for transmission. Information remains in transmit RAM until overwritten.

*The PCS0 bit represents the dual-function PCS0/SS.

Command RAM is used by the QSPI when in master mode. The CPU writes one byte of control infor-

mation to this segment for each QSPI command to be executed. The QSPI cannot modify information

in command RAM.

CR[0:F] — Command RAM

$YFFD40

6543210

CONT

BITSE

DSCK

PCS3

PCS2

PCS1

PCS0*

—

CONT

BITSE

DSCK

PCS3

PCS2

PCS1

PCS0*

RECEIVE

RAM

TRANSMIT

RAM

500

51E

520

53E

WORD

540

54F

COMMAND

RAM

BYTE

WORD

RR0

RR1

RR2

RRD

RRE

RRF

TR0

TR1

TR2

TRD

TRE

TRF

CR0

CR1

CR2

CRD

CRE

CRF

Freescale Semiconductor, Inc.

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