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S29GL01GP датащи(PDF) 65 Page - SPANSION |
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S29GL01GP датащи(HTML) 65 Page - SPANSION |
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65 / 81 page ![]() October 22, 2012 S29GL-P_00_A14 S29GL-P MirrorBit® Flash Family 65 Data She e t 11.7.4 S29GL-P Alternate CE# Controlled Erase and Program Operations Notes 1. Not 100% tested. 2. See DC Characteristics on page 56 for more information. 3. For 1–32 words/1–64 bytes programmed. 4. Effective write buffer specification is based upon a 32-word/64-byte write buffer operation. 5. Unless otherwise indicated, AC specifications are tested with VIO = 1.8 V and VCC = 3.0 V. Table 11.7 S29GL-P Alternate CE# Controlled Erase and Program Operations Parameter Description (Notes) Speed Options JEDEC Std. 90 100 110 120 130 Unit tAVAV tWC Write Cycle Time (Note 1) Min 90 100 110 120 130 ns tAVWL tAS Address Setup Time Min 0 ns tASO Address Setup Time to OE# low during toggle bit polling Min 15 ns tELAX tAH Address Hold Time Min 45 ns tAHT Address Hold Time From CE# or OE# high during toggle bit polling Min 0 ns tDVEH tDS Data Setup Time Min 30 ns tEHDX tDH Data Hold Time Min 0 ns tCEPH CE# High during toggle bit polling Min 20 ns tOEPH OE# High during toggle bit polling Min 20 ns tGHEL tGHEL Read Recovery Time Before Write (OE# High to CE# Low) Min 0 ns tWLEL tWS WE# Setup Time Min 0 ns tEHWH tWH WE# Hold Time Min 0 ns tELEH tCP CE# Pulse Width Min 35 ns tEHEL tCPH CE# Pulse Width High Min 30 ns tWHWH1 tWHWH1 Write Buffer Program Operation (Notes 2, 3) Typ 480 µs Effective Write Buffer Program Operation (Notes 2, 4)Per Word Typ 15 µs Effective Accelerated Write Buffer Program Operation (Notes 2, 4) Per Word Typ 13.5 µs Program Operation (Note 2) Word Typ 60 µs Accelerated Programming Operation (Note 2) Word Typ 54 µs tWHWH2 tWHWH2 Sector Erase Operation (Note 2) Typ 0.5 sec |
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