S29GL01GP datasheet(32/81 Pages) SPANSION

32 / 81 page

S29GL-P MirrorBit® Flash Family

S29GL-P_00_A14 October 22, 2012

Da ta

Sh e e t

7.7.4

Chip Erase Command Sequence

Chip erase is a six-bus cycle operation as indicated by Table 12.1 on page 69. These commands invoke the

Embedded Erase algorithm, which does not require the system to preprogram prior to erase. The Embedded

Erase algorithm automatically preprograms and verifies the entire memory to an all zero data pattern prior to

electrical erase. After a successful chip erase, all locations of the chip contain FFFFh. The system is not

required to provide any controls or timings during these operations. The Command Definitions on page 68

shows the address and data requirements for the chip erase command sequence.

When the Embedded Erase algorithm is complete, that sector returns to the read mode and addresses are no

longer latched. The system can determine the status of the erase operation by using DQ7 or DQ6/DQ2. Refer

to “Write Operation Status” for information on these status bits.

The Unlock Bypass feature allows the host system to send program commands to the Flash device without

first writing unlock cycles within the command sequence. See Section 7.7.8 for details on the Unlock Bypass

function.

Any commands written during the chip erase operation are ignored. However, note that a hardware reset

immediately terminates the erase operation. If that occurs, the chip erase command sequence should be

reinitiated once that sector has returned to reading array data, to ensure the entire array is properly erased.

Software Functions and Sample Code

The following is a C source code example of using the chip erase function. Refer to the Spansion Low Level

Driver User’s Guide (available on www.spansion.com) for general information on Spansion Flash memory

software development guidelines.

/* Example: Chip Erase Command */

/* Note: Cannot be suspended

*( (UINT16 *)base_addr + 0x555 ) = 0x00AA;

/* write unlock cycle 1

*( (UINT16 *)base_addr + 0x2AA ) = 0x0055;

/* write unlock cycle 2

*( (UINT16 *)base_addr + 0x555 ) = 0x0080;

/* write setup command

*( (UINT16 *)base_addr + 0x555 ) = 0x00AA;

/* write additional unlock cycle 1 */

*( (UINT16 *)base_addr + 0x2AA ) = 0x0055;

/* write additional unlock cycle 2 */

*( (UINT16 *)base_addr + 0x555 ) = 0x0010;

/* write chip erase command

Table 7.9 Chip Erase

(LLD Function = lld_ChipEraseCmd)

Cycle

Description

Operation

Byte Address

Word Address

Data

Unlock

Write

Base + AAAh

Base + 555h

00AAh

Unlock

Write

Base + 555h

Base + 2AAh

0055h

Setup Command

Write

Base + AAAh

Base + 555h

0080h

Unlock

Write

Base + AAAh

Base + 555h

00AAh

Unlock

Write

Base + 555h

Base + 2AAh

0055h

Chip Erase Command

Write

Base + AAAh

Base + 555h

0010h

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