S29GL01GP datasheet(48/81 Pages) SPANSION

48 / 81 page

S29GL-P MirrorBit® Flash Family

S29GL-P_00_A14 October 22, 2012

Da ta

Sh e e t

8.5

Advanced Sector Protection Software Examples

Table 8.2 contains all possible combinations of the DYB, PPB, and PPB Lock Bit relating to the status of the

sector. In summary, if the PPB Lock Bit is locked (set to “0”), no changes to the PPBs are allowed. The PPB

Lock Bit can only be unlocked (reset to “1”) through a hardware reset or power cycle. See also Figure 8.1 for

an overview of the Advanced Sector Protection feature.

8.6

Hardware Data Protection Methods

The device offers two main types of data protection at the sector level via hardware control:

 When WP#/ACC is at V

IL, the either the highest or lowest sector is locked (device specific).

There are additional methods by which intended or accidental erasure of any sectors can be prevented via

hardware means. The following subsections describes these methods:

8.6.1

WP#/ACC Method

The Write Protect feature provides a hardware method of protecting one outermost sector. This function is

provided by the WP#/ACC pin and overrides the previously discussed Sector Protection/Unprotection

method.

If the system asserts VIL on the WP#/ACC pin, the device disables program and erase functions in the

highest or lowest sector independently of whether the sector was protected or unprotected using the method

described in Advanced Sector Protection/Unprotection on page 42.

If the system asserts VIH on the WP#/ACC pin, the device reverts to whether the boot sectors were last set to

be protected or unprotected. That is, sector protection or unprotection for these sectors depends on whether

they were last protected or unprotected.

The WP#/ACC pin must be held stable during a command sequence execution. WP# has an internal pull-up;

when unconnected, WP# is set at VIH.

Note

If WP#/ACC is at VIL when the device is in the standby mode, the maximum input load current is increased.

See Table 11.2 on page 54 for details.

8.6.2

Low VCC Write Inhibit

When VCC is less than VLKO, the device does not accept any write cycles. This protects data during VCC

power-up and power-down.

The command register and all internal program/erase circuits are disabled, and the device resets to reading

array data. Subsequent writes are ignored until VCC is greater than VLKO. The system must provide the

proper signals to the control inputs to prevent unintentional writes when VCC is greater than VLKO.

Table 8.2 Sector Protection Schemes: DYB, PPB and PPB Lock Bit Combinations

Unique Device PPB Lock Bit

0 = locked

1 = unlocked

Sector PPB

0 = protected

1 = unprotected

Sector DYB

0 = protected

1 = unprotected

Sector Protection Status

Any Sector

Protected through PPB

Any Sector

Protected through PPB

Any Sector

Unprotected

Any Sector

Protected through DYB

Any Sector

Protected through PPB

Any Sector

Protected through PPB

Any Sector

Protected through DYB

Any Sector

Unprotected

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