900844 datasheet(95/118 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

900844

FUNCTIONAL DEVICE OPERATION

ADC SUBSYSTEM

Touch Screen Pen detection bias can be enabled via the PENDETEN bit in the ADCCNTL1 register. When this bit is enabled

and a pen touch is detected, the PENDET bit in register ADCINT is set and the PMICINT pin is asserted. This is to interrupt the

system, because a touch screen pen touch has been detected at the next ADC cycle, unless the interrupt is masked.

The prior reference for the touch screen (Touch Bias) is TSREF and is powered from VCORE. In touch screen operation,

TSREF is a dedicated regulator. No loads other than the touch screen should be connected here. When the ADC performs non

touch screen conversions, the ADC does not rely on TSREF and the reference can be disabled.

The readouts are designed such that the on chip switch resistances are of no influence to the overall readout. The readout

scheme does not account for contact resistances, as present in the touch screen connectors. Therefore, the touch screen

readings have to be calibrated by the user or in the factory, where one has to point with a stylus to the opposite corners of the

screen. When reading out the X-coordinate, the 10-bit ADC reading represents a 10-bit coordinate with '0' for a coordinate equal

to X- and full scale '1023' when equal to X+. When reading out the Y-coordinate, the 10-bit ADC reading represents a 10-bit

coordinate with '0' for a coordinate equal to Y- and full scale '1023' when equal to Y+. When reading the contact resistance the

10-bit ADC reading represents the voltage drop over the contact resistance created by the known current source multiplied by 2.

ADC STATUS/CONTROL REGISTERS AND BIT DESCRIPTION

Reference the Table 67 for read/write conditions and default state for each of these registers

Table 66. Touch Screen System Requirements

Description

Symbol

Min

Typ

Max

Unit

Plate Resistance X, Y

100

1000

Resistance Between Plates, Contact

180

1200

Capacitance Between Plates

0.5

2.0

Contact Resistance Current Source

100

μA

Interrupt Current Source

μA

Interrupt Threshold

Current Source Inaccuracy

Quiescent Current (Active Mode)

μA

Max Load Current (Active Mode)

Settling Time (Position Measurement)

3.0

5.5

μs

Table 67. ADC Interrupt/Mask Registers Structure and Bits Description

Name

Bits

Description

ADCINT (ADDR 0x5F - R - Default Value: 0x00)

RND

ADC Round Robin Cycle Completion Interrupt

x0 = Not Completed

x1 = Completed

PENDET

Touch Screen Pen Detection Interrupt

x0 = Pen Not Detected

x1 = Pen Detected

Reserved

7:2

Reserved

MADCINT (ADDR 0x60 - R/W -Default Value: 0x00)

MRND

ADC Round Robin Cycle Completion Interrupt Mask

x0 = Unmask

x1 = Mask

MPENDET

Touch Screen Pen Detection Interrupt Mask

x0 = Unmask

x1 = Mask

Reserved

7:2

Reserved

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