900844 datasheet(73/118 Pages) FREESCALE

73 / 118 page

Analog Integrated Circuit Device Data

Freescale Semiconductor

900844

FUNCTIONAL DEVICE OPERATION

POWER SUPPLIES

Figure 38. VPMIC Detailed Internal Block Diagram

Main Features

• Uses V21 as the main power supply

• 100 mA maximum continuous output current

• Optimized for a 2.2 µF external filter capacitor with a maximum of 10 m

Ω ESR

• Uses an internal pass FET

• The output for each LDO is monitored for over-current conditions and under-voltage events

VYMXYFI18

VYMXYFI18 is a low drop-out (LDO) fully integrated regulator with a P-CH Pass FET. It is high performance, low noise, and

high PSRR, with a low quiescent current and fast transient response. VYMXYFI18 is actively discharged during shutdown.

VYMXYFI18 can be supplied by either the V21 output voltage (V21) or directly from the VPWR node. Using V21 as the input

voltage supply offers enhanced thermal performance and higher efficiency. Using the VPWR node can offer enhanced

performance against noise coupling from an output of a DC/DC regulator. Users are encouraged to take the resulting thermal

dissipation in account when supplying VYMXYFI18 directly from VPWR. For more information about package thermal

capabilities, reference Thermal Management.

Table 35. VPMIC Register Structure and Bits Description

Name

Bits

Description

VPMICCNT (ADDR 0x41 - R/W - Default Value: 0x07)

CTLVPMIC

2:0

VPMIC State Control

x0 = Reserved

x1 = Reserved

x2 = Reserved

x3 = Reserved

x4 = OFF

x5 = Low Power

x6 = Active

x7 = Active

AOACCTLVPMIC

5:3

VPMIC State Control during AOAC Exit (when the Exit pin is EXITSTBY pin is asserted). These bits will be

initialized by the system SPI controller after power up.

X0 = Do not copy

x1 = Do not copy

x2 = Do not copy

x3 = Do not copy

x4 = OFF

x5 = Low Power

x6 = Active

x7 = Active

Reserved

7:6

Reserved

Controller

VOPMIC

VOUTPMIC

Output Monitor

IOPMIC

SPI

Interface

COPMIC

VOPMIC

CTLVPMIC

AOACCTLVPMIC

VPMICFAULT

VREF

Discharge

PVIN 2P1

(Shared with VCC180 and VPNL18)

GND2P1

(Shared with VCC180 and VPNL18)

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