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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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900844 датащи(PDF) 41 Page - Freescale Semiconductor, Inc |
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900844 датащи(HTML) 41 Page - Freescale Semiconductor, Inc |
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41 / 118 page  Analog Integrated Circuit Device Data Freescale Semiconductor 41 900844 FUNCTIONAL DEVICE OPERATION SYSTEM CONTROL INTERFACE X is from 1 to 8 in Table 13. The rest of the 24 registers reside in the Freescale dedicated register space. X is from 1 to 16 in Table 14. Output Driver Control Select output pins output drive capability can be programmed for 4 different settings as shows in the following tables. All of the following outputs follow the settings as shown. PLL Control The following register controls the PLL and the different divider values for different output frequencies. Table 13. General Purpose Memory MEMx Register Structure and Bits Description Register Name Bits Description MEMx - 7:0 General Purpose Memory Register x Table 14. General Purpose Memory FSLMEMx Register Structure and Bits Description Register Name Bits Description FSLMEMx - 7:0 General Purpose Memory Register x Table 15. Output Driver Control Selection Slope Select Rise Time (ns) Fall Time (ns) 0 0 8.4 7.0 0 1 6.2 6.2 1 0 Hi-Z Hi-Z 1 1 22.3 21.3 Table 16. Output Driver Register Structure and Bit Description Name Bits Description FSLOUTDRVCNTL1 (ADDR 0x1BF - R/W - Default Value: 0x00) PWRGDDRV 1:0 PWRGD Output Pin Driver Capability VRCOMPBDRV 3:2 VRCOMP Output Pin Driver Capability PMICINTDRV 5:4 PMICINT Output Pin Driver Capability RESETBDRV 7:6 RESETB Output Pin Driver Capability FSLOUTDRVCNTL3 (ADDR 0x1C1 - R/W - Default Value: 0x01) SPISDODRV 1:0 MISO Output Pin Driver Capability RSVD 7:2 Reserved |
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