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900844 датащи(PDF) 83 Page - Freescale Semiconductor, Inc |
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900844 датащи(HTML) 83 Page - Freescale Semiconductor, Inc |
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83 / 118 page ![]() Analog Integrated Circuit Device Data Freescale Semiconductor 83 900844 FUNCTIONAL DEVICE OPERATION POWER SUPPLIES POWER SUPPLY REGISTER MASK Mask writes to the power supply registers, in order to avoid the need for the system controller to do read-modify-write cycles. The mask register is shown in Table 47. Figure 48 shows an example of the operation of the PWRMASK register. Figure 48. PWRMASK Register Implementation Example POWER SUPPLY PROGRAMMABLE RAMP RATE Turn on time of all buck regulators can be programmed through the SPI, reference Table 48 Table 46. Power Switches Control Registers Structure and Bits Description Name Bits Description VPANEL33CNT (ADDR 0x4F - R/W - Default Value: 0x24) CTLVPANEL33 2:0 VPNL33 State Control x0 = Reserved x1 = Reserved x2 = Reserved x3 = Reserved x4 = OFF x5 = Low Power x6 = Active x7 = Active AOACCTLVPANEL33 5:3 VPNL33 State Control during AOAC Exit (when the Exit pin is EXITSTBY pin is asserted). These bits will be initialized by the system SPI controller after power up. X0 = Do not copy x1 = Do not copy x2 = Do not copy x3 = Do not copy x4 = OFF x5 = Low Power x6 = Active x7 = Active Reserved 7:6 Reserved Table 47. Mask Register Register name ADDR R/W D7 D6 D5 D4 D3 D2 D1 D0 initial PWRMASK 0x34 R/W M7 M6 M5 M4 M3 M2 M1 M0 0x00 Table 48. Ramp Rate Control Registers (Freescale Defined) Name Bits Description FSLTONTCNTL1 (ADDR 0x1C8 - R/W - Default Value: 0xAA) VCCTONT 1:0 Turn On Time Settings for VCC Regulator x0 = 180 μs x1 = 90 μs x2 = 45 μs x3 = 22 μs VNNTONT 3:2 Turn On Time Settings for VNN Regulator x0 = 180 μs x1 = 90 μs x2 = 45 μs x3 = 22 μs D7 D6 D5 D4 D3 D2 D1 D0 Power Supply Register Before Write 101 01 010 PWRMASK Register Settings 111 10 000 Example SPI Write to Power Supply 1 1 1 1 1 1 1 1 Power Supply Register After Write 101 01 111 |
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