900844 datasheet(60/118 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

900844

FUNCTIONAL DEVICE OPERATION

POWER SUPPLIES

The same VID input signals are shared between VNN and VNN, where a latch signal for each regulator decides which

regulator takes control of the VID input signals.

The DAC value represents the output voltage value. The output voltage node is connected directly to the inverting input of the

error amplifier that uses the DAC output as its reference, unity gain configuration. Using this configuration with internal

compensation eliminates the need for the feedback and compensation network, which saves board space and cost. The DAC/

output voltage slew rate is internally set 25 mV/µs to minimize transient currents and audible noise.

The switcher can operate in different modes depending on the load conditions. These modes can be set through the SPI and

include a PFM mode, an Automatic Pulse Skipping mode, and a PWM mode. The previous selection is optimized to maximum

battery life based on load conditions.

VNN will be discharged every time the regulator is shutting down.

The output current is sense in the same way as it is done on VCC regulator. (See VCC)

The sensed output current value will also be used for over-current protection. If an over-current condition is detected, the

regulator will limit the current through cycle by cycle operation and alert the system through the VNNFAULT signal, which will in

turn assert the VRFAULT Interrupt signal.

Figure 25. VNN Detailed Internal Block Diagram

Main Features

• Uses the VPWR rail as its power supply

• It is used to provide power to the Graphics Core.

• Single-phase Solution with Integrated Drivers and external MOSFETs

• VID Controlled for dynamic voltage scaling requirements of high performance processors

•1.0 MHz switching frequency

• High efficiency operating modes depending on load conditions

• Output can be discharged through the low side switch.

• Loss-Less Output Current Sensing with over-current protection

• Uses internal compensation

• Gate drive circuits are supplied directly from VPWR

Efficiency Curves

Figure 26 efficiency curves are calculated under PWM mode based on the recommended external component values and

typical output voltage of 1.2 V. 3.0 V

≤ VPWR ≤ 4.4 V.

Driver

Controller

Internal

Compensation

VOUTFBNN

VPWR

CONN

CINCC

LNN

VNN

HSNNGT

LSNNGT

PGNDNN

CSPNN

PVINNN

SWFBNN

SPI

Interface

CTLVNN

AOACCTLVNN

VNNFAULT

VREF

DAC

MHSNN

MLSNN

Current Sense

Amp

INN

VIDEN0

VIDEN1

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