HT68F13 datasheet(96/161 Pages) HOLTEK

96 / 161 page

As the name of the mode suggests, after a comparison is made, the TM output pin, will change state.

The TM output pin condition however only changes state when an TnAF or TnBF interrupt request

flag is generated after a compare match occurs from Comparator A or Comparator B. The TnPF

interrupt request flag, generated from a compare match from Comparator P, will have no effect on the

TM output pin. The way in which the TM output pin changes state is determined by the condition of

the TnAIO1 and TnAIO0 bits in the TMnC1 register for ETM CCRA, and the TnBIO1 and TnBIO0

bits in the TMnC2 register for ETM CCRB. The TM output pin can be selected using the TnAIO1,

TnAIO0 bits (for the TPnA pin) and TnBIO1, TnBIO0 bits (for the TPnB_0, TPnB_1 or TPnB_2 pins)

to go high, to go low or to toggle from its present condition when a compare match occurs from

Comparator A or a compare match occurs from Comparator B. The initial condition of the TM output

pin, which is setup after the TnON bit changes from low to high, is setup using the TnAOC or TnBOC

bit for TPnA or TPnB_0, TPnB_1, TPnB_2 output pins. Note that if the TnAIO1,TnAIO0 and

TnBIO1, TnBIO0 bits are zero then no pin change will take place.

HT68F13/HT68F14/HT68F15

Enhanced I/O Flash Type MCU

Rev. 1.10

February 9, 2011

Counter Value

0x3FF

CCRP

CCRA

TnON

TnPAU

TnAPOL

CCRP Int.

Flag TnPF

CCRA Int.

Flag TnAF

TPnA O/P

Time

CCRA=0

CCRA = 0

Counter overflow

CCRA > 0 Counter cleared by CCRA value

Pause

Resume

Stop

Counter Restart

TnCCLR = 1; TnAM [1:0] = 00

Output pin set to

initial Level Low

if TnAOC=0

Output Toggle with

TnAF flag

Note TnAIO [1:0] = 10

Active High Output select

Here TnAIO [1:0] = 11

Toggle Output select

Output not affected by

TnAF flag. Remains High

until reset by TnON bit

Output Pin

Reset to Initial value

Output controlled by

other pin-shared function

Output Inverts

when TnAPOL is high

TnPF not

generated

No TnAF flag

generated on

CCRA overflow

Output does

not change

ETM CCRA Compare Match Output Mode -- TnCCLR = 1

Note:

1. With TnCCLR=1 a Comparator A match will clear the counter

2. The TPnA output pin is controlled only by the TnAF flag

3. The TPnA output pin is reset to its initial state by a TnON bit rising edge

4. The TnPF flag is not generated when TnCCLR=1

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