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HT68F13 датащи(PDF) 94 Page - Holtek Semiconductor Inc |
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HT68F13 датащи(HTML) 94 Page - Holtek Semiconductor Inc |
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94 / 161 page ![]() Compare Output Mode To select this mode, bits TnAM1, TnAM0 and TnBM1, TnBM0 in the TMnC1/TMnC2 registers should be all cleared to zero. In this mode once the counter is enabled and running it can be cleared by three methods. These are a counter overflow, a compare match from Comparator A and a compare match from Comparator P. When the TnCCLR bit is low, there are two ways in which the counter can be cleared. One is when a compare match occurs from Comparator P, the other is when the CCRP bits are all zero which allows the counter to overflow. Here both the TnAF and TnPF interrupt request flags for Comparator A and Comparator P respectively, will both be generated. If the TnCCLR bit in the TMnC1 register is high then the counter will be cleared when a compare match occurs from Comparator A. However, here only the TnAF interrupt request flag will be generated even if the value of the CCRP bits is less than that of the CCRA registers. Therefore when TnCCLR is high no TnPF interrupt request flag will be generated. HT68F13/HT68F14/HT68F15 Enhanced I/O Flash Type MCU Rev. 1.10 94 February 9, 2011 Counter Value 0x3FF CCRP CCRA TnON TnPAU TnAPOL CCRP Int. Flag TnPF CCRA Int. Flag TnAF TPnA O/P Pin Time CCRP=0 CCRP > 0 Counter overflow CCRP > 0 Counter cleared by CCRP value Pause Resume Stop Counter Restart TnCCLR = 0; TnAM [1:0] = 00 Output pin set to initial Level Low if TnAOC=0 Output Toggle with TnAF flag Note TnAIO [1:0] = 10 Active High Output select Here TnAIO [1:0] = 11 Toggle Output select Output not affected by TnAF flag. Remains High until reset by TnON bit Output Pin Reset to Initial value Output controlled by other pin-shared function Output Inverts when TnAPOL is high ETM CCRA Compare Match Output Mode -- TnCCLR = 0 Note: 1. With TnCCLR=0 a Comparator P match will clear the counter 2. The TPnA output pin is controlled only by the TnAF flag 3. The output pin is reset to its initial state by a TnON bit rising edge |
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