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13892 датащи(PDF) 82 Page - Freescale Semiconductor, Inc

номер детали 13892
подробное описание детали  Power Management and User Interface IC
PDF  156 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

13892 датащи(HTML) 82 Page - Freescale Semiconductor, Inc

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5V B oost Efficien cy
(Vin = 3.6V, Vout = 5V)
80.00
85.00
90.00
95.00
100.00
0
100
200
300
Boost Load Cur rent (m A)
Analog Integrated Circuit Device Data
82
Freescale Semiconductor
13892
FUNCTIONAL DEVICE OPERATION
SUPPLIES
Figure 24. Boost Switcher Efficiency
LINEAR REGULATORS
This section describes the linear regulators provided. For convenience, these regulators are named to indicate their typical or
possible applications, but the supplies are not limited to these uses and may be applied to any loads within the specified regulator
capabilities.
A low power standby mode controlled by STANDBY is provided in which the bias current is aggressively reduced. This mode
is useful for deep sleep operation where certain supplies cannot be disabled, but active regulation can be tolerated with lesser
parametric requirements. The output drive capability and performance are limited in this mode. Refer to STANDBY Event
Definition and Control in Power Control System for more details.
Some dedicated regulators are covered in their related chapters rather than in the Supplies chapter (i.e., the VUSB and VUSB2
supplies are included in Connectivity).
Apart from the integrated linear regulators, there are also GPO output pins provided to enable and disable discrete regulators
or functional blocks, or to use as a general purpose output for any system need. For example, one application may be to enable
a battery pack thermistor bias in synchronization with timed ADC conversions.
All regulators use the main bandgap as the reference. The main bandgap is bypassed with a capacitor at REFCORE. The
bandgap and the rest of the core circuitry is supplied from VCORE. The performance of the regulators is directly dependent on
the performance of VCOREDIG and the bandgap. No external DC loading is allowed on VCOREDIG or REFCORE. VCOREDIG
is kept powered as long as there is a valid supply and/or coin cell. Table 53 captures the main characteristics of the core circuitry.
Table 53. Core Specifications
VCOREDIG (Digital core supply)
Output voltage in ON mode (61),(62)
1.5 V
Output voltage in Off mode(62)
1.2 V
Bypass Capacitor
2.2
μF typ (0.65 μF derated)
VCORE (Analog core supply)
Output voltage in ON mode (61),(62)
2.775 V
Output voltage in Off mode (62)
0 V
Bypass Capacitor
2.2
μF typ (0.65 μF derated)
REFCORE (Bandgap / Regulator Reference)
Output voltage (61)
1.20 V
Absolute Accuracy
0.50%
Temperature Drift
0.25%
Bypass Capacitor
100 nF typ (65 nF derated)
Notes
61.
3.0 V < BP < 4.65 V, no external loading on VCOREDIG, VCORE, or REFCORE. Extended operation down to UVDET, but no system
malfunction.
62.
The core is in On mode when charging or when the state machine of the IC is not in the Off mode nor in the power cut mode. Otherwise,
the core is in Off mode.
Reference
Parameter
Target



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