L9803 datasheet(42/126 Pages) STMICROELECTRONICS

42 / 126 page

On-Chip Peripherals

L9803

42/126

5.2.2

Main Features

●

Programmable prescaler: fcpu divided by 2, 4 or 8.

●

Overflow status flag and maskable interrupt

●

External clock input (must be at least 4 times slower than the CPU clock speed) with

the choice of active edge

●

Output compare functions with

–

2 dedicated 16-bit registers

–

2 dedicated programmable signals

–

2 dedicated status flags

–

1 dedicated maskable interrupt

●

Input capture functions with

–

2 dedicated 16-bit registers

–

2 dedicated active edge selection signals

–

2 dedicated status flags

–

1 dedicated maskable interrupt

●

Pulse width modulation mode (PWM)

●

One pulse mode

●

5 alternate functions on I/O ports

The Block Diagram is shown in Figure 19 on page 43.

Note:

Some external pins are not available on all devices. Refer to the device pin out description.

5.2.3

Functional Description

Counter

The main block of the Programmable Timer is a 16-bit free running upcounter and its

associated 16-bit registers. The 16-bit registers are made up of two 8-bit registers called

high & low.

Counter Register (CR):

–

Counter High Register (CHR) is the most significant byte (MS Byte).

–

Counter Low Register (CLR) is the least significant byte (LS Byte).

Alternate Counter Register (ACR)

–

Alternate Counter High Register (ACHR) is the most significant byte (MS Byte).

–

Alternate Counter Low Register (ACLR) is the least significant byte (LS Byte).

These two read-only 16-bit registers contain the same value but with the difference that

reading the ACLR register does not clear the TOF bit (Timer overflow flag), located in the

Status register (SR). (See note at the end of paragraph titled 16-bit read sequence).

Writing in the CLR register or ACLR register resets the free running counter to the FFFCh

value.

Both counters have a reset value of FFFCh (this is the only value which is reloaded in the

16-bit timer). The reset value of both counters is also FFFCh in One Pulse mode and PWM

mode.

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