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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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L9803 датащи(PDF) 68 Page - STMicroelectronics |
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L9803 датащи(HTML) 68 Page - STMicroelectronics |
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68 / 126 page  On-Chip Peripherals L9803 68/126 Figure 33. Impedance at PWMO/I pin 5.4.3 PWMI PWMI is an input line, directly connected to PB2 bit. The circuit translates the voltage levels referred to VB voltage supply to the internal logic levels (see Figure 32). When the voltage on PWMI pin is higher than VB/2 PB2 reads an high logic level. If the bit PWMI in DCSR register is set (see Section 3.2.1), PWMI is directly connected with the Input Capture 2 on Timer 2, which is otherwise connected in alternate function to PA7 (see Figure 34). An internal pull down current generator (5µA) allows to detect the Open Bus condition (external pull up missing). If the battery or ground connection are lost, the PWMI line shows a controlled impedance characteristic (see Figure 34). Figure 34. PWMI function Describe the register DCSR (0022h) as reported in Table 1. 50K Ω 50K Ω 5 µA VK IK 14V 0 1 TIMER 2 ICAP2 PIEN DCSR PWM I/O M U X PWM INPUT PA(7) ALTERNATE INPUT PORT PWMI PA7 PA(7) PB(2) |
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