L9803 datasheet(94/126 Pages) STMICROELECTRONICS

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On-Chip Peripherals

L9803

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5.8.2

Main Features

The nominal current is 2A.

The low-side switch is a n-channel DMOS transistor while the high-side switch is a p-

channel DMOS transistor. Therefore no charge pump is needed.

An anti-crossconduction circuit is included: the low side DMOS is switched on only when the

high side is switched off and vice versa. This function avoid the two DMOS are switched on

together firing the high current path from battery to ground. The function is obtained by

sensing the gate voltage and therefore the delay between command and effective switch on

of the DMOS doesn’t have a fixed length.

The MCU controls all operations of the power stage through the BCSR dedicated register.

Short circuit and overtemperature conditions are reported to the CPU using dedicated error

flags.

Overtemperature and short circuit conditions switch off the bridge immediately without CPU

intervention. The function of the flags is independent of the operation mode of the bridge

(sink, source, Z).

In addition both the PWM modules can be directly connected to the power bridge. The

power bridge offers then many driving mode alternatives:

Direct Mode: the two half bridges are directly driven by IN1 and IN2 control bit in BCSR.

PWM1 Up/Down Brake Mode: the output of PWM1 drives one side of the bridge while the

other side is maintained in a fixed status.

PWM1 Symmetrical Driving Mode: PWM1 line drives directly and symmetrically both side of

the bridge.

PWM1/PWM2 Mode: PWM1 drives one side while PWM2 drives the other (two independent

half bridges).

5.8.3

Functional Description

A schematic description of the Power Bridge circuit is depicted in Figure 45. In this

schematic the transistors must be considered in ON condition when they gate is high (set).

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