поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

CDCE72010RGCT датащи(PDF) 18 Page - Texas Instruments

Click here to check the latest version.
номер детали CDCE72010RGCT
подробное описание детали  Ten Output High Performance Clock Synchronizer, Jitter Cleaner, and Clock Distributor
PDF  73 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI - Texas Instruments

CDCE72010RGCT датащи(HTML) 18 Page - Texas Instruments

Back Button CDCE72010RGCT Datasheet HTML 14Page - Texas Instruments CDCE72010RGCT Datasheet HTML 15Page - Texas Instruments CDCE72010RGCT Datasheet HTML 16Page - Texas Instruments CDCE72010RGCT Datasheet HTML 17Page - Texas Instruments CDCE72010RGCT Datasheet HTML 18Page - Texas Instruments CDCE72010RGCT Datasheet HTML 19Page - Texas Instruments CDCE72010RGCT Datasheet HTML 20Page - Texas Instruments CDCE72010RGCT Datasheet HTML 21Page - Texas Instruments CDCE72010RGCT Datasheet HTML 22Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 18 / 73 page
background image
SPI CONTROL INTERFACE
Bit0
Bit1
……
Bit29
Bit30
Bit31
SPI_CLK
SPI_MOSI
SPI_LE
t1
t2
t3
t4
t5
t6
t7
Bit30Bit31
SPI_CLK
SPI_MOSI
SPI_MISO
SPI_LE
Bit0Bit1
Bit2
t2
t3
t6
t7
t8
CDCE72010
SCAS858A – JUNE 2008 – REVISED JULY 2009.............................................................................................................................................................. www.ti.com
The serial interface of the CDCE72010 is a simple bidirectional SPI interface for writing and reading to and from
the registers of the device. It consists of four control lines: SPI_CLK, SPI_MOSI, SPI_MISO, and SPI_LE. There
are twelve 28-bit wide registers that can be saved to the EEPROM on-chip, and one status register that is a read
only register. Those registers can be addressed by the four LSBs of a transferred word (bit 0, 1, 2, and bit 3).
Every transmitted word must have 32 bits, starting with LSB first. Each word can be written separately. The
transfer is initiated with the falling edge of SPI_LE; as long as SPI_LE is high, no data can be transferred. During
SPI_LE low, data can be written. The data has to be applied at SPI_MOSI and has to be stable before the rising
edge of SPI_CLK. The transmission is finished by a rising edge of SPI_LE.
Figure 11. Timing Diagram for SPI Write Command
Figure 12. Timing Diagram for SPI Read Command
18
Submit Documentation Feedback
Copyright © 2008–2009, Texas Instruments Incorporated
Product Folder Link(s): CDCE72010



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com