CDCE72010RGCT datasheet(63/73 Pages) TI

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UNIVERSAL OUTPUT BUFFERS

LVCMOS

LVPECL

LVDS

RAMBits::

CDCE72010

www.ti.com.............................................................................................................................................................. SCAS858A – JUNE 2008 – REVISED JULY 2009

The CDCE72010 is designed to drive three types of clock signaling, LVPECL, LVDS, and LVCMOS from each of

the ten outputs. This super buffer that contains all three drivers is refered to as the Universal Output Buffer. Only

one driver can be enabled at one time. Each universal output buffer is made from four independent buffers in

parallel. When LVPECL mode is selected, only the LVPECL Buffer is enabled and the rest of the buffers are

3-stated and in low power mode. When Selecting LVDS, only the LVDS Buffer is enabled and the rest of the

buffers are 3-stated and in low power mode. When LVCMOS mode is selected, both LVCMOS drivers are

enabled. One LVCMOS buffer drives the negative side and the other buffer drives the positive pin.

The LVCMOS drivers are driven from the same output divider but have separate control bits. In SPI Mode, bits

22, 23, 24, and 25 of Registers 0 to 9 are used to put the LVCMOS buffer in active, inverting, low, or 3-state. In

CD Mode, those bits are used for different functions and the LVCMOS buffer can be active when selected or

3-state when their not.

Figure 29. Universal Output Buffer

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